new changes to future work

docs/FutureTasks/docs.org

@@ -93,3 +93,53 @@ and improving performance, especially for frequent memory operations.
 
 #+NAME: fig:MEMALLOC
 [[./memory_allocator.drawio.png]]
+
+*** Box 1
+The diagram above mentions 3 particular implementations. The first box which is the
+standard THP(Transparent huge pages) utilised by modern allocators. THP initially
+emphasises on doing smalled allocations and as the number of allocations grows
+uses a technique which groups all smaller allocations together and when done
+converts them into a large page of size 4mb in allocators such as jemalloc.
+
+This approach does incur addtional operations such as grouping smaller allocations
+chaging the TLB entries (Adding more oppurtunity for TLB misses). Only once the
+huge page is created the TLB misses are reduced.
+
+*** Box 2
+Box 2 which refers to our current implementation always pre-allocates huge pages
+and untilises CHERI bounds to track each allocation inside the huge page. Allowing
+a single entry with the combination of bounds to provide block based behavoir in
+physically contigous memory while ensuring a pointer can only access a regoin
+within it's defined bounds.
+
+Another aspect to note is that the bounds can be of a dynamic size when defined. This is
+in contrast to defining multiple page entries which need to be fixed sizes which means
+they always incur multiple entries. In the current approach when the huge page size is
+hit a new one is created. The limitaton of this is appraoch being we are limited to the
+huge page set by the processor implementation (In our case the CHERI ARM v8.1).
+
+*** Box 3
+The 3rd box specifies an alternate appraoch by not using huge pages and required
+memory is not required to be physically contigous. In this approach the pointer
+stores all the metadata to the translation from virtual to physical addresses.
+
+*** Building up from the work of Box 2 and Box 3
+Box 2 and 3 from a high overview there is only minor difference which can be noted
+which is 1 uses huge pages and other does not. Both approaches can strip down the
+number intructions needed in modern allocators (Stripping away the need transitioning
+from smaller to larger pages). This document is yet to give an exact breakdown.
+
+As seen to the right of the diagram is a sample snippet of TC malloc from the paper
+(Beyond malloc efficiency to fleet allocators). This whole span function would not
+be required in our approach. The other benefit being easier get the approach by
+getting mmap embedded inside the allocator.
+
+*** Evaluation:
+- Amount of instructions that can be stripped away from the page aware
+  memory allocator.
+- Comparing memory allocator with wall clock run time with the modified mmap and without the modified mmap.
+- CHERI purecap does incur additional instruction such as bound checks. Does this approach as a whole
+  reduce the number of instructions as whole (Comparing CHERIpurecap instructions with memory allocator
+  emitted vs regular ARMv8 clang program with the same allocator). 
+
+