185 lines
8.4 KiB
Plaintext
185 lines
8.4 KiB
Plaintext
\begin{thebibliography}{21}
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\providecommand{\natexlab}[1]{#1}
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\providecommand{\url}[1]{\texttt{#1}}
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\expandafter\ifx\csname urlstyle\endcsname\relax
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\providecommand{\doi}[1]{doi: #1}\else
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\providecommand{\doi}{doi: \begingroup \urlstyle{rm}\Url}\fi
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\bibitem[Lustig et~al.(2013)Lustig, Bhattacharjee, and Martonosi]{TLBHierarchy}
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Daniel Lustig, Abhishek Bhattacharjee, and Margaret Martonosi.
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\newblock Tlb improvements for chip multiprocessors: Inter-core cooperative
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prefetchers and shared last-level tlbs.
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\newblock \emph{ACM Trans. Archit. Code Optim.}, 10\penalty0 (1), April 2013.
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\newblock ISSN 1544-3566.
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\newblock \doi{10.1145/2445572.2445574}.
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\newblock URL \url{https://doi.org/10.1145/2445572.2445574}.
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\bibitem[Mittal()]{mittal_survey_2017}
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Sparsh Mittal.
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\newblock A survey of techniques for architecting {TLBs}.
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\newblock 29\penalty0 (10):\penalty0 e4061.
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\newblock ISSN 1532-0634.
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\newblock \doi{10.1002/cpe.4061}.
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\newblock URL \url{https://onlinelibrary.wiley.com/doi/abs/10.1002/cpe.4061}.
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\newblock \_eprint: https://onlinelibrary.wiley.com/doi/pdf/10.1002/cpe.4061.
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\bibitem[Panwar et~al.()Panwar, Bansal, and Gopinath]{panwar_hawkeye_2019}
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Ashish Panwar, Sorav Bansal, and K.~Gopinath.
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\newblock {HawkEye}: Efficient fine-grained {OS} support for huge pages.
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\newblock In \emph{Proceedings of the Twenty-Fourth International Conference on
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Architectural Support for Programming Languages and Operating Systems}, pages
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347--360. {ACM}.
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\newblock ISBN 978-1-4503-6240-5.
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\newblock \doi{10.1145/3297858.3304064}.
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\newblock URL \url{https://dl.acm.org/doi/10.1145/3297858.3304064}.
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\bibitem[Woodruff et~al.({\natexlab{a}})Woodruff, Watson, Chisnall, Moore,
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Anderson, Davis, Laurie, Neumann, Norton, and Roe]{woodruff_cheri_2014}
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Jonathan Woodruff, Robert~N.M. Watson, David Chisnall, Simon~W. Moore, Jonathan
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Anderson, Brooks Davis, Ben Laurie, Peter~G. Neumann, Robert Norton, and
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Michael Roe.
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\newblock The {CHERI} capability model: revisiting {RISC} in an age of risk.
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\newblock 42\penalty0 (3):\penalty0 457--468, {\natexlab{a}}.
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\newblock ISSN 0163-5964.
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\newblock \doi{10.1145/2678373.2665740}.
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\newblock URL \url{https://doi.org/10.1145/2678373.2665740}.
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\bibitem[Woodruff et~al.({\natexlab{b}})Woodruff, Joannou, Xia, Fox, Norton,
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Chisnall, Davis, Gudka, Filardo, Markettos, Roe, Neumann, Watson, and
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Moore]{woodruff_cheri_2019}
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Jonathan Woodruff, Alexandre Joannou, Hongyan Xia, Anthony Fox, Robert~M.
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Norton, David Chisnall, Brooks Davis, Khilan Gudka, Nathaniel~W. Filardo,
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A.~Theodore Markettos, Michael Roe, Peter~G. Neumann, Robert N.~M. Watson,
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and Simon~W. Moore.
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\newblock {CHERI} concentrate: Practical compressed capabilities.
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\newblock 68\penalty0 (10):\penalty0 1455--1469, {\natexlab{b}}.
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\newblock ISSN 0018-9340, 1557-9956, 2326-3814.
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\newblock \doi{10.1109/TC.2019.2914037}.
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\newblock URL \url{https://ieeexplore.ieee.org/document/8703061/}.
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\bibitem[Pham et~al.(2014)Pham, Bhattacharjee, Eckert, and Loh]{TLBReach}
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Binh Pham, Abhishek Bhattacharjee, Yasuko Eckert, and Gabriel~H. Loh.
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\newblock Increasing tlb reach by exploiting clustering in page translations.
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\newblock In \emph{2014 IEEE 20th International Symposium on High Performance
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Computer Architecture (HPCA)}, pages 558--567, 2014.
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\newblock \doi{10.1109/HPCA.2014.6835964}.
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\bibitem[Navarro et~al.(2003)Navarro, Iyer, Druschel, and Cox]{THP}
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Juan Navarro, Sitararn Iyer, Peter Druschel, and Alan Cox.
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\newblock Practical, transparent operating system support for superpages.
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\newblock \emph{SIGOPS Oper. Syst. Rev.}, 36\penalty0 (SI):\penalty0 89–104,
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December 2003.
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\newblock ISSN 0163-5980.
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\newblock \doi{10.1145/844128.844138}.
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\newblock URL \url{https://doi.org/10.1145/844128.844138}.
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\bibitem[Cornea et~al.(2003)Cornea, Harrison, and Tang]{IntelItanium}
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Marius Cornea, John Harrison, and Ping Tak~Peter Tang.
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\newblock Intel® itanium® floating-point architecture.
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\newblock In \emph{Proceedings of the 2003 Workshop on Computer Architecture
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Education: Held in Conjunction with the 30th International Symposium on
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Computer Architecture}, WCAE '03, page 3–es, New York, NY, USA, 2003.
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Association for Computing Machinery.
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\newblock ISBN 9781450347327.
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\newblock \doi{10.1145/1275521.1275526}.
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\newblock URL \url{https://doi.org/10.1145/1275521.1275526}.
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\bibitem[Park and Park(2001)]{Shadow_superpages}
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Cheol~Ho Park and Daeyeon Park.
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\newblock Aggressive superpage support with the shadow memory and the
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partial-subblock tlb.
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\newblock \emph{Microprocessors and Microsystems}, 25\penalty0 (7):\penalty0
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329--342, 2001.
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\newblock ISSN 0141-9331.
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\newblock \doi{https://doi.org/10.1016/S0141-9331(01)00125-9}.
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\newblock URL
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\url{https://www.sciencedirect.com/science/article/pii/S0141933101001259}.
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\bibitem[Basu et~al.(2013)Basu, Gandhi, Chang, Hill, and Swift]{DirectSegment}
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Arkaprava Basu, Jayneel Gandhi, Jichuan Chang, Mark~D. Hill, and Michael~M.
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Swift.
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\newblock Efficient virtual memory for big memory servers.
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\newblock \emph{SIGARCH Comput. Archit. News}, 41\penalty0 (3):\penalty0
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237–248, June 2013.
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\newblock ISSN 0163-5964.
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\newblock \doi{10.1145/2508148.2485943}.
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\newblock URL \url{https://doi.org/10.1145/2508148.2485943}.
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\bibitem[Karakostas et~al.()Karakostas, Gandhi, Ayar, Cristal, Hill,
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{McKinley}, Nemirovsky, Swift, and Ünsal]{karakostas_redundant_2015}
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Vasileios Karakostas, Jayneel Gandhi, Furkan Ayar, Adrián Cristal, Mark~D.
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Hill, Kathryn~S. {McKinley}, Mario Nemirovsky, Michael~M. Swift, and Osman
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Ünsal.
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\newblock Redundant memory mappings for fast access to large memories.
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\newblock In \emph{Proceedings of the 42nd Annual International Symposium on
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Computer Architecture}, pages 66--78. {ACM}.
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\newblock ISBN 978-1-4503-3402-0.
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\newblock \doi{10.1145/2749469.2749471}.
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\newblock URL \url{https://dl.acm.org/doi/10.1145/2749469.2749471}.
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\bibitem[Chen et~al.(2023)Chen, Tong, Yang, Yi, and
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Cheng]{chen_flexpointer_2023}
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Dongwei Chen, Dong Tong, Chun Yang, Jiangfang Yi, and Xu~Cheng.
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\newblock Flexpointer: Fast address translation based on range tlb and tagged
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pointers.
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\newblock \emph{ACM Trans. Archit. Code Optim.}, 20\penalty0 (2), March 2023.
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\newblock ISSN 1544-3566.
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\newblock \doi{10.1145/3579854}.
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\newblock URL \url{https://doi.org/10.1145/3579854}.
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\bibitem[Evans()]{evans_scalable_nodate}
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Jason Evans.
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\newblock A {Scalable} {Concurrent} malloc(3) {Implementation} for {FreeBSD}.
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\bibitem[Evans(2006)]{jemalloc}
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Jason Evans.
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\newblock A scalable concurrent malloc (3) implementation for freebsd.
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\newblock In \emph{Proc. of the bsdcan conference, ottawa, canada}, 2006.
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\bibitem[che()]{cheribsd}
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Benchmark {ABI} - {CheriBSD} 23.11 new features tutorial.
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\newblock URL
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\url{https://www.cheribsd.org/tutorial/23.11/benchmark/index.html}.
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\bibitem[Ben()]{Benchmark}
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{CHERI}-allocator/benchmarks/benchmarks/{StressTestMalloc}/glibc-bench.c at
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main · akilan1999/{CHERI}-allocator.
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\newblock URL
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\url{https://github.com/Akilan1999/CHERI-Allocator/blob/main/benchmarks/benchmarks/StressTestMalloc/glibc-bench.c}.
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\bibitem[Mor()]{Morello}
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Department of computer science and technology – {CHERI}: The arm morello
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board.
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\newblock URL
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\url{https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri-morello.html}.
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\bibitem[Watson et~al.(2023)Watson, Clarke, Sewell, Woodruff, Moore, Barnes,
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Grisenthwaite, Stacer, Baranga, and Richardson]{BenchmarkABI}
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Robert N.~M. Watson, Jessica Clarke, Peter Sewell, Jonathan Woodruff, Simon~W.
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Moore, Graeme Barnes, Richard Grisenthwaite, Kathryn Stacer, Silviu Baranga,
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and Alexander Richardson.
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\newblock {Early performance results from the prototype Morello
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microarchitecture}.
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\newblock Technical Report UCAM-CL-TR-986, University of Cambridge, Computer
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Laboratory, 15 JJ Thomson Avenue, Cambridge CB3 0FD, United Kingdom, phone
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+44 1223 763500, September 2023.
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\bibitem[Per()]{PerformanceCounter}
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Arm architecture reference manual for a-profile architecture.
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\newblock URL \url{https://developer.arm.com/documentation/ddi0487/latest}.
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\bibitem[Singh(1993)]{singh1993}
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Jaswinder~Pal Singh.
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\newblock \emph{Parallel Hierarchical N-body Methods and Their Implications for
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Multiprocessors}.
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\newblock PhD thesis, Stanford University, February 1993.
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\bibitem[Holt and Singh(1995)]{holt1995}
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C.~Holt and Jaswinder~Pal Singh.
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\newblock Hierarchical n-body methods on shared address space multiprocessors.
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\newblock In \emph{SIAM Conference on Parallel Processing for Scientific
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Computing}, February 1995.
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\newblock To appear.
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\end{thebibliography}
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