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Changes for GFE hardware build with 512-bit bus.

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Jonathan Woodruff
2022-11-23 13:29:46 +00:00
parent e73d8223ea
commit 06a9221bb1
5 changed files with 20 additions and 10 deletions
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6
src_Core/CPU/LLC_AXI4_Adapter.bsv
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@@ -73,9 +73,9 @@ module mkLLC_AXi4_Adapter #(MemFifoClient #(idT, childT) llc)
Bits#(childT, childSz),
FShow#(ToMemMsg#(idT, childT)),
FShow#(MemRsMsg#(idT, childT)),
Add#(SizeOf#(Line), 0, TAdd#(512, 4)),
Add#(c__, TAdd#(1, TAdd#(idSz, childSz)), Wd_MId) // LLC_AXI_ID must fit into the external ID.
); // assert Line sz = 512 + 4 tags
Add#(SizeOf#(Line), 0, TAdd#(512, 4)), // assert Line sz = 512 + 4 tags
Add#(a__, SizeOf#(LLC_AXI_ID#(idT, childT)), Wd_MId) // LLC_AXI_ID must fit into the external ID.
);
// Verbosity: 0: quiet; 1: LLC transactions; 2: loop detail
Integer verbosity = 2;