Restore per-instruction commit prints by default

2025-01-08 18:43:21 +00:00
parent 1df304a820
commit 1ae93da4f8
1 changed files with 1 additions and 1 deletions
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
@@ -299,7 +299,7 @@ deriving (Eq, FShow, Bits);
 module mkCommitStage#(CommitInput inIfc)(CommitStage);
    Bool verbose = False;

-    Integer verbosity = 0;   // Bluespec: for lightweight verbosity trace
+    Integer verbosity = 1;   // Bluespec: for lightweight verbosity trace

    // Used to inform tandem-verifier about program order.
    // 0 is used to indicate we've just come out of reset