added todo
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10
builds/RV64ACDFIMSUxCHERI_Toooba_bluesim/analyse.txt
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10
builds/RV64ACDFIMSUxCHERI_Toooba_bluesim/analyse.txt
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@@ -0,0 +1,10 @@
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800028f8: 00c6d693 srli a3,a3,0xc
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800028fc: 00c75713 srli a4,a4,0xc
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80002908: 00a69693 slli a3,a3,0xa
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8000290c: 00a71713 slli a4,a4,0x4
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80002910: 0016e693 ori a3,a3,1
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80002914: 00176713 ori a4,a4,1
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80002920: 6ed8b223 sd a3,1764(a7)
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8000292c: 6ce6b823 sd a4,1744(a3)
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@@ -3488,6 +3488,7 @@ instret:1326 PC:0x1ffff000000000000ffffffffffe02404 instr:0x0187b303 iType:L
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48880 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: 'h0 ; PRqMsg { addr: 'h0000000080007010, toState: S, child: }
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48880 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: valid process
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48890 L1 top.soc_top.corew_proc.core_0 sendRsToP: tagged PRq 'h0 ; PRqMsg { addr: 'h0000000080007010, toState: S, child: } ; CRsMsg { addr: 'h0000000080007010, toState: S, data: tagged Valid CLine { tag: <V False False False False >, data: <V <V 'h0000000000000000 'h0000000000000000 > <V 'h00000000200140df 'h0000000000000000 > <V 'h0000000000000000 'h0000000000000000 > <V 'h0000000000000000 'h0000000000000000 > > }, child: }
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Add entry rule called
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instret:1327 PC:0x1ffff000000000000ffffffffffe02408 instr:0x01e73023 iType:St [doCommitNormalInst [0]] 4900
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49010 L1 top.soc_top.corew_proc.core_0 cRqTransfer_new: 'h4 ; ProcRq { id: 'h00, addr: 'h0000000080050000, toState: M, op: St, byteEn: <V False True False True False True False True False True False True False True False True >, data: TaggedData { tag: False, data: <V 'haaaaaaaaaaaaaaaa 'haaaaaaaaaaaaaaaa > }, amoInst: AmoInst { func: None, width: Word, aq: True, rl: False }, loadTags: False, pcHash: 'hdbe8 }
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instret:1328 PC:0x1ffff000000000000ffffffffffe0240c instr:0x01d73423 iType:St [doCommitNormalInst [0]] 4901
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@@ -17397,6 +17398,7 @@ instret:2787 PC:0x1ffff000000000000ffffffffffe000c4 instr:0x10200073 iType:S
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88540 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: 'h0 ; PRqMsg { addr: 'h0000000080007010, toState: S, child: }
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88540 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: valid process
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88550 L1 top.soc_top.corew_proc.core_0 sendRsToP: tagged PRq 'h0 ; PRqMsg { addr: 'h0000000080007010, toState: S, child: } ; CRsMsg { addr: 'h0000000080007010, toState: S, data: tagged Valid CLine { tag: <V False False False False >, data: <V <V 'h0000000000000000 'h0000000000000000 > <V 'h000000002001401f 'h0000000000000000 > <V 'h0000000000000000 'h0000000000000000 > <V 'h0000000000000000 'h0000000000000000 > > }, child: }
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Add entry rule called
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instret:2788 PC:0x1ffff0000000000000000000000002adc instr:0x00000000 iType:Unsupported [doCommitTrap] 8870
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instret:2789 PC:0x1ffff000000000000ffffffffffe000c8 instr:0x14011173 iType:Csr [doCommitSystemInst] 8885
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procReq: vm_info: VMInfo { prv: 'h1, asid: 'h0, sv39: True, exeReadable: False, userAccessibleByS: False, basePPN: 'h00000080004, globalCapLoadGenU: 'h0, globalCapLoadGenS: 'h0 } en : TlbEntry { vpn: 'h7fffe00, ppn: 'h00000080000, pteType: PTEType { dirty: True, accessed: True, global: False, user: False, executable: True, writable: True, readable: True }, pteUpperType: PTEUpperType { cap_writable: False, cap_readable: False, cap_dirty: False, cap_read_mod: False, cap_read_gen: False }, level: 'h1, asid: 'h0 } r : TlbReq { addr: 'hffffffffffe096d8, write: True, capStore: False, potentialCapLoad: False }
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@@ -18323,6 +18325,7 @@ instret:2922 PC:0x1ffff000000000000ffffffffffe000b8 instr:0x0f053f03 iType:L
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instret:2923 PC:0x1ffff000000000000ffffffffffe000bc instr:0x0f853f83 iType:Ld [doCommitNormalInst [0]] 9513
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instret:2924 PC:0x1ffff000000000000ffffffffffe000c0 instr:0x05053503 iType:Ld [doCommitNormalInst [0]] 9514
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instret:2925 PC:0x1ffff000000000000ffffffffffe000c4 instr:0x10200073 iType:Sret [doCommitSystemInst] 9516
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Add entry rule called
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95450 L1 top.soc_top.corew_proc.core_0 pRqTransfer: 'h2 ; PRqMsg { addr: 'h0000000080050adc, toState: S, child: }
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95460 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: 'h2 ; PRqMsg { addr: 'h0000000080050adc, toState: S, child: }
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95460 L1 top.soc_top.corew_proc.core_0 pipelineResp: pRq: valid process
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@@ -54,6 +54,7 @@ function Maybe#(MemInst) decodeMemInst(Instruction inst, Bool cap_mode, RiscVISA
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let funct5 = inst[31:27];
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let funct3 = inst[14:12];
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// mem_func + amo_func
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MemFunc mem_func = Ld;
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AmoFunc amo_func = None;
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@@ -262,6 +263,7 @@ function Maybe#(MemInst) decodeExplicitBoundsMemInst(Instruction inst);
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endfunction
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function CapChecks memCapChecks(Bool cap_mode);
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// TODO (Akilan): To extract offset for PPN
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CapChecks capChecks = unpack(0);
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capChecks.check_enable = True;
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capChecks.check_low_src = Vaddr;
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