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Prepared repo for building on FPGA

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This commit is contained in:
Karlis Susters
2023-02-13 21:52:50 +00:00
parent 9d027a3f4b
commit 2c9428d1f3
4 changed files with 115 additions and 36 deletions
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4
builds/Resources/Include_Common.mk
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@@ -96,7 +96,7 @@ BSC_COMPILATION_FLAGS += \
-D RISCV \
-D PERFORMANCE_MONITORING \
-D RAS_HIT_TRACING \
-D TSO_MM -D RVFI\
-D TSO_MM \
-D NO_SPEC_TRAINING -D NO_SPEC_REDIRECT -D NO_SPEC_STRAIGHT_PATH -D SPEC_RSB_FIXUP -D MELTDOWN_CF \
-keep-fires -aggressive-conditions -no-warn-action-shadowing -check-assert \
-suppress-warnings G0020 -steps-max-intervals 10000000 \
@@ -104,7 +104,7 @@ BSC_COMPILATION_FLAGS += \
-promote-warnings T0054 \
+RTS -K128M -RTS -show-range-conflict
# -D NO_SPEC_TRAINING -D NO_SPEC_REDIRECT -D NO_SPEC_STRAIGHT_PATH -D SPEC_RSB_FIXUP -D NO_SPEC_RSB_PUSH -D NO_SPEC_STL
# -D NO_SPEC_TRAINING -D NO_SPEC_REDIRECT -D NO_SPEC_STRAIGHT_PATH -D SPEC_RSB_FIXUP -D NO_SPEC_RSB_PUSH -D NO_SPEC_STL -D RVFI
# ================================================================
# Runs simulation executable on ELF given by EXAMPLE

25
builds/Resources/Include_RISCY_Config.mk
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@@ -45,6 +45,11 @@ SIM_LLC_ARBITER_LAT ?=
# default check cache deadlock and rename error
CHECK_DEADLOCK ?= true
RENAME_DEBUG ?= false
INSTR_PREFETCHER_LOCATION ?= L1
INSTR_PREFETCHER_TYPE ?= NEXT_LINE_ON_MISS
DATA_PREFETCHER_LOCATION ?= L1
DATA_PREFETCHER_TYPE ?= BLOCK
# clk frequency depends on core size
ifneq (,$(filter $(CORE_SIZE),TINY SMALL BOOM MEDIUM))
@@ -62,6 +67,21 @@ $(error unsupported CACHE_SIZE)
endif
ifeq (,$(filter $(INSTR_PREFETCHER_LOCATION),NONE L1 L1LL LL))
$(error unsupported INSTR_PREFETCHER_LOCATION)
endif
ifeq (,$(filter $(INSTR_PREFETCHER_TYPE),NEXT_LINE_ON_MISS NEXT_LINE_ON_ALL SINGLE_WINDOW MULTI_WINDOW SINGLE_WINDOW_TARGET MULTI_WINDOW_TARGET))
$(error unsupported INSTR_PREFETCHER_TYPE)
endif
ifeq (,$(filter $(DATA_PREFETCHER_LOCATION),NONE L1 L1LL LL))
$(error unsupported DATA_PREFETCHER_LOCATION)
endif
ifeq (,$(filter $(DATA_PREFETCHER_TYPE),MARKOV BLOCK STRIDE))
$(error unsupported DATA_PREFETCHER_TYPE)
endif
# ================================================================
# These are taken from: RISCY_HOME/procs/scripts/Makefile.common
@@ -76,7 +96,10 @@ BSC_COMPILATION_FLAGS += \
-D XILINX_FP_FMA_LATENCY=$(XILINX_FP_FMA_LATENCY) \
-D XILINX_INT_MUL_LATENCY=$(XILINX_INT_MUL_LATENCY) \
-D USE_BSV_BRAM_SYNC_FIFO \
-D INSTR_PREFETCHER_IN_$(INSTR_PREFETCHER_LOCATION) \
-D INSTR_PREFETCHER_$(INSTR_PREFETCHER_TYPE) \
-D DATA_PREFETCHER_IN_$(DATA_PREFETCHER_LOCATION) \
-D DATA_PREFETCHER_$(DATA_PREFETCHER_TYPE)
# TODO:
# -D SELF_INV_CACHE -D L1D_MAX_HITS=$(SELF_INV_CACHE)

2
src_Core/CPU/Proc.bsv
View File

@@ -237,6 +237,7 @@ module mkProc (Proc_IFC);
endrule
end
/*
// ================================================================
// Send and print perf requests
@@ -320,6 +321,7 @@ module mkProc (Proc_IFC);
end
endrule
end
*/
// ================================================================
// Print out values written 'tohost'

120
src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
View File

@@ -1297,64 +1297,118 @@ provisos(
endmodule
module mkL1IPrefetcher(Prefetcher);
//let m <- mkNextLinePrefetcher;
//let m <- mkMultiWindowPrefetcher;
//let m <- mkNextLineOnAllPrefetcher;
//let m <- mkDoNothingPrefetcher;
let m <- mkAlwaysRequestPrefetcher;
//let m <- mkSingleWindowTargetPrefetcher;
//let m <- mkMultiWindowTargetPrefetcher;
`ifdef INSTR_PREFETCHER_IN_L1
`ifdef INSTR_PREFETCHER_NEXT_LINE_ON_ALL
let m <- mkNextLineOnAllPrefetcher;
`elsif INSTR_PREFETCHER_NEXT_LINE_ON_MISS
let m <- mkNextLineOnMissPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW
let m <- mkSingleWindowPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW_TARGET
let m <- mkBRAMSingleWindowTargetPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW
let m <- mkMultiWindowPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW_TARGET
let m <- mkBRAMMultiWindowTargetPrefetcher;
`endif
//let m <- mkAlwaysRequestPrefetcher;
//let m <- mkPrintPrefetcher;
`else
let m <- mkDoNothingPrefetcher;
`endif
return m;
endmodule
module mkLLIPrefetcherInL1I(Prefetcher);
//let m <- mkNextLineOnMissPrefetcher;
//let m <- mkMultiWindowPrefetcher;
//let m <- mkMultiWindowTargetPrefetcher;
//let m <- mkSingleWindowPrefetcher;
//let m <- mkSingleWindowTargetPrefetcher;
`ifdef INSTR_PREFETCHER_IN_L1LL
`ifdef INSTR_PREFETCHER_NEXT_LINE_ON_ALL
let m <- mkNextLineOnAllPrefetcher;
`elsif INSTR_PREFETCHER_NEXT_LINE_ON_MISS
let m <- mkNextLineOnMissPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW
let m <- mkSingleWindowPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW_TARGET
let m <- mkBRAMSingleWindowTargetPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW
let m <- mkMultiWindowPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW_TARGET
let m <- mkBRAMMultiWindowTargetPrefetcher;
`endif
//let m <- mkAlwaysRequestPrefetcher;
//let m <- mkPrintPrefetcher;
`else
let m <- mkDoNothingPrefetcher;
`endif
return m;
endmodule
module mkLLIPrefetcher(Prefetcher);
//let m <- mkNextLineOnMissPrefetcher;
//let m <- mkMultiWindowPrefetcher;
//let m <- mkMultiWindowTargetPrefetcher;
//let m <- mkSingleWindowPrefetcher;
//let m <- mkSingleWindowTargetPrefetcher;
`ifdef INSTR_PREFETCHER_IN_LL
`ifdef INSTR_PREFETCHER_NEXT_LINE_ON_ALL
let m <- mkNextLineOnAllPrefetcher;
`elsif INSTR_PREFETCHER_NEXT_LINE_ON_MISS
let m <- mkNextLineOnMissPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW
let m <- mkSingleWindowPrefetcher;
`elsif INSTR_PREFETCHER_SINGLE_WINDOW_TARGET
let m <- mkBRAMSingleWindowTargetPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW
let m <- mkMultiWindowPrefetcher;
`elsif INSTR_PREFETCHER_MULTI_WINDOW_TARGET
let m <- mkBRAMMultiWindowTargetPrefetcher;
`endif
//let m <- mkAlwaysRequestPrefetcher;
//let m <- mkPrintPrefetcher;
`else
let m <- mkDoNothingPrefetcher;
`endif
return m;
endmodule
module mkL1DPrefetcher(PCPrefetcher);
//let m <- mkNextLineOnAllPrefetcher;
//let m <- mkStridePCPrefetcher;
let m <- mkDoNothingPCPrefetcher;
`ifdef DATA_PREFETCHER_IN_L1
`ifdef DATA_PREFETCHER_BLOCK
let m <- mkPCPrefetcherAdapter(mkBlockPrefetcher);
`elsif DATA_PREFETCHER_STRIDE
let m <- mkBRAMStridePCPrefetcher;
`elsif DATA_PREFETCHER_MARKOV
let m <- mkPCPrefetcherAdapter(mkBRAMMarkovPrefetcher);
`endif
//let m <- mkPCPrefetcherAdapter(mkAlwaysRequestPrefetcher);
//let m <- mkMarkovPCPrefetcher;
//let m <- mkPCPrefetcherAdapter(mkBlockPrefetcher);
`else
let m <- mkPCPrefetcherAdapter(mkDoNothingPrefetcher);
`endif
return m;
endmodule
module mkLLDPrefetcherInL1D(PCPrefetcher);
//let m <- mkNextLineOnAllPrefetcher;
//let m <- mkStridePCPrefetcher;
let m <- mkDoNothingPCPrefetcher;
`ifdef DATA_PREFETCHER_IN_L1LL
`ifdef DATA_PREFETCHER_BLOCK
let m <- mkPCPrefetcherAdapter(mkBlockPrefetcher);
`elsif DATA_PREFETCHER_STRIDE
let m <- mkBRAMStridePCPrefetcher;
`elsif DATA_PREFETCHER_MARKOV
let m <- mkPCPrefetcherAdapter(mkBRAMMarkovPrefetcher);
`endif
//let m <- mkPCPrefetcherAdapter(mkAlwaysRequestPrefetcher);
//let m <- mkMarkovPCPrefetcher;
//let m <- mkPCPrefetcherAdapter(mkBlockPrefetcher);
`else
let m <- mkPCPrefetcherAdapter(mkDoNothingPrefetcher);
`endif
return m;
endmodule
module mkLLDPrefetcher(Prefetcher);
//let m <- mkNextLineOnAllPrefetcher;
//let m <- mkMarkovPrefetcher;
//let m <- mkPrintPrefetcher;
let m <- mkAlwaysRequestPrefetcher;
//let m <- mkDoNothingPrefetcher;
//let m <- mkBlockPrefetcher;
`ifdef DATA_PREFETCHER_IN_LL
`ifdef DATA_PREFETCHER_BLOCK
let m <- mkBlockPrefetcher;
`elsif DATA_PREFETCHER_STRIDE
doAssert(False, "Illegal data prefetcher type for LL cache!")
`elsif DATA_PREFETCHER_MARKOV
let m <- mkBRAMMarkovPrefetcher;
`endif
//let m <- mkPCPrefetcherAdapter(mkAlwaysRequestPrefetcher);
`else
let m <- mkDoNothingPrefetcher;
`endif
return m;
endmodule