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Fix a few errors in the previous commit, and importantly, make the

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"push" from writeback just a write to the location that was meant to
push to, rather than the current head.
This commit is contained in:
Jonathan Woodruff
2022-03-10 11:04:54 +00:00
parent 9d68d877d9
commit 37a7745f1a
2 changed files with 15 additions and 20 deletions
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10
src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
View File

@@ -845,6 +845,7 @@ module mkFetchStage(FetchStage);
`endif
end
end // if (!isValid(cause))
if (isValid(m_push_addr)) trainInfo.ras = trainInfo.ras + 1;
decode_pc_reg[i] <= getAddr(ppc);
let out = FromFetchStage{pc: pc,
`ifdef RVFI_DII
@@ -876,12 +877,7 @@ module mkFetchStage(FetchStage);
end // if (decodeIn[i] matches tagged Valid .in)
end // for (Integer i = 0; i < valueof(SupSize); i=i+1)
if (m_push_addr matches tagged Valid .pc)
`ifdef NO_SPEC_RSB_PUSH
ras.willPush;
`else
ras.push(pc);
`endif
if (m_push_addr matches tagged Valid .pc) ras.push(pc);
// update PC and epoch
if(redirectPc matches tagged Valid .rp) begin
@@ -1032,7 +1028,7 @@ module mkFetchStage(FetchStage);
// nextAddrPred.update(pc, next_pc, taken);
//end
`ifdef NO_SPEC_RSB_PUSH
if (link) ras.push(addPc(pc, isCompressed ? 2 : 4));
if (link) ras.write(addPc(pc, isCompressed ? 2 : 4), trainInfo.ras);
`endif
if (iType == Br) begin
// Train the direction predictor for all branches

25
src_Core/RISCY_OOO/procs/lib/Ras.bsv
View File

@@ -58,6 +58,7 @@ interface ReturnAddrStack;
method Action willPush;
method Bool pendingPush;
method Action push(CapMem pushAddr);
method Action write(CapMem pushAddr, RasIndex h);
method Action setHead(RasIndex h);
method Action flush;
method Bool flush_done;
@@ -87,32 +88,30 @@ module mkRas(ReturnAddrStack) provisos(NumAlias#(TExp#(TLog#(RasEntries)), RasEn
method ActionValue#(RasIndex) pop(Bool doPop);
RasIndex h = head[i];
if (doPop) begin
head[i] <= head[i] - 1;
h = h - 1;
$display("RAS pop head<-%d, val:%x", head[i] - 1, stack[head[i]][0]);
end
head[i] <= h;
return h;
endmethod
endinterface);
end
method Action willPush;
Reg#(RasIndex) h = head[valueof(SupSize) + 2];
h <= h+1;
$display("RAS head<-%d", h + 1);
endmethod
method Bool pendingPush = False;//(pendingPushReg[0] > 0 && pendingPushDelay < 6);
method Action push(CapMem pushAddr);
`ifdef NO_SPEC_RSB_PUSH
stack[head[0]][1] <= pushAddr;
$display("RAS push stack[%d] <- %x", head[0], pushAddr);
`else
Reg#(RasIndex) h = head[valueof(SupSize) + 2];
h <= h+1;
`ifndef NO_SPEC_RSB_PUSH
stack[h+1][1] <= pushAddr;
$display("RAS push stack[%d] <- %x", head[0], pushAddr);
$display("RAS head<-%d", h + 1);
$display("RAS push stack[%d] <- %x", h+1, pushAddr);
`endif
h <= h+1;
$display("RAS head<-%d", h + 1);
endmethod
method Action write(CapMem pushAddr, RasIndex h);
stack[h][1] <= pushAddr;
$display("RAS write stack[%d] <- %x", h, pushAddr);
endmethod
method Action setHead(RasIndex h);