Bumped BlueStuff and made necessary adaptations

This commit is contained in:
Franz Fuchs
2021-09-23 15:25:46 +01:00
parent 4c194d4e82
commit 4cfac08bca
3 changed files with 7 additions and 7 deletions

View File

@@ -499,13 +499,13 @@ endmodule: mkCoreW
module mkCoreW_Synth #(Reset dm_power_on_reset)
(CoreW_IFC_Synth #(N_External_Interrupt_Sources));
let core <- mkCoreW (dm_power_on_reset);
let cpu_imem_master_synth <- toAXI4_Master_Synth (core.cpu_imem_master);
let cpu_dmem_master_synth <- toAXI4_Master_Synth (core.cpu_dmem_master);
let cpu_imem_master_sig <- toAXI4_Master_Sig (core.cpu_imem_master);
let cpu_dmem_master_sig <- toAXI4_Master_Sig (core.cpu_dmem_master);
method set_verbosity = core.set_verbosity;
method start = core.start;
interface cpu_imem_master = cpu_imem_master_synth;
interface cpu_dmem_master = cpu_dmem_master_synth;
interface cpu_imem_master = cpu_imem_master_sig;
interface cpu_dmem_master = cpu_dmem_master_sig;
interface core_external_interrupt_sources = core.core_external_interrupt_sources;
method nmi_req = core.nmi_req;
`ifdef RVFI_DII

View File

@@ -150,11 +150,11 @@ interface CoreW_IFC_Synth #(numeric type t_n_interrupt_sources);
// AXI4 Fabric interfaces
// CPU IMem to Fabric master interface
interface AXI4_Master_Synth #(TAdd#(Wd_MId,1), Wd_Addr, Wd_Data,
interface AXI4_Master_Sig #(TAdd#(Wd_MId,1), Wd_Addr, Wd_Data,
0, 0, 0, 0, 0) cpu_imem_master;
// CPU DMem to Fabric master interface
interface AXI4_Master_Synth #(TAdd#(Wd_MId,1), Wd_Addr, Wd_Data,
interface AXI4_Master_Sig #(TAdd#(Wd_MId,1), Wd_Addr, Wd_Data,
0, 0, 0, 0, 0) cpu_dmem_master;
// ----------------------------------------------------------------