Support for stat counters from the tag controller.

The order of the events is very not tested; 50% chance of being correct.
This commit is contained in:
jon
2020-12-17 12:38:52 +00:00
parent 4131dcd073
commit bab989d6d2
5 changed files with 31 additions and 1 deletions

View File

@@ -74,6 +74,7 @@ import ProcTypes :: *;
// Main fabric
import Fabric_Defs :: *; // for Wd_Id, Wd_Addr, Wd_Data...
import SoC_Map :: *;
import CCTypes :: *; // for EventsCache.
`ifdef INCLUDE_GDB_CONTROL
import Debug_Module :: *;
@@ -172,6 +173,19 @@ module mkCoreW #(Reset dm_power_on_reset)
// AXI4 tagController
TagControllerAXI#(Wd_MId, Wd_Addr, Wd_Data) tagController <- mkTagControllerAXI(reset_by hart0_reset); // TODO double check if reseting like this is good enough
mkConnection(proc.master0, tagController.slave, reset_by hart0_reset);
`ifdef PERFORMANCE_MONITORING
rule report_tagController_events;
Vector#(7, Bit#(1)) evts = tagController.events;
EventsCache ce = unpack(0);
ce.evt_ST = zeroExtend(evts[0]); // Unsure of mapping from EventsCacheCore to 7-bit vector.
ce.evt_ST_MISS = zeroExtend(evts[1]);
ce.evt_LD = zeroExtend(evts[2]);
ce.evt_LD_MISS = zeroExtend(evts[3]);
ce.evt_EVICT = zeroExtend(evts[4]);
// SET_TAG_WRITE/READ aren't used in TagCache; tag table data is not tagged.
proc.events_tgc(ce);
endrule
`endif
// PLIC (Platform-Level Interrupt Controller)
PLIC_IFC_16_2_7 plic <- mkPLIC_16_2_7;