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removed unnecessary declarations in RenameStage

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This commit is contained in:
Franz Fuchs
2022-07-25 13:18:50 +01:00
parent 32843f127f
commit d3e8ef8d90
1 changed files with 0 additions and 2 deletions
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2
src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv
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@@ -735,7 +735,6 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage);
doAssert(!isValid(dInst.csr), "Mem never explicitly read/write CSR");
doAssert((dInst.iType != Fence) == isValid(dInst.imm),
"Mem (non-Fence) needs imm for virtual addr");
Bit#(16) dum = hash(getAddr(pc));
// put in ldstq
if(isLdQ) begin
lsq.enqLd(inst_tag, mem_inst, allow_cap, phy_regs.dst, spec_bits, hash(getAddr(pc)));
@@ -1071,7 +1070,6 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage);
"Mem (non-Fence) needs imm for virtual addr");
doAssert(!isValid(spec_tag), "should not have spec tag");
// put in ldstq
Bit#(16) dum = hash(getAddr(pc));
if(isLdQ) begin
lsq.enqLd(inst_tag, mem_inst, phy_regs.dst, spec_bits, hash(getAddr(pc)));
end