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Generated src_SSITH_P3_sim RTL

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This commit is contained in:
Niraj Sharma
2020-02-06 17:14:59 +05:30
parent 83829590dd
commit d8a3c3d754
92 changed files with 25675 additions and 27383 deletions
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225
src_SSITH_P3_sim/Verilog_RTL/mkDebug_Module.v
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@@ -1,5 +1,5 @@
//
// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
//
//
//
@@ -10,7 +10,9 @@
// dmi_read_data O 32
// RDY_dmi_read_data O 1
// RDY_dmi_write O 1
// RDY_hart0_get_reset_req_get O 1 reg
// hart0_reset_client_request_get O 1 reg
// RDY_hart0_reset_client_request_get O 1 reg
// RDY_hart0_reset_client_response_put O 1 reg
// hart0_client_run_halt_request_get O 1 reg
// RDY_hart0_client_run_halt_request_get O 1 reg
// RDY_hart0_client_run_halt_response_put O 1 reg
@@ -25,8 +27,10 @@
// hart0_csr_mem_client_request_get O 77 reg
// RDY_hart0_csr_mem_client_request_get O 1 reg
// RDY_hart0_csr_mem_client_response_put O 1 reg
// RDY_get_ndm_reset_req_get O 1 reg
// master_awvalid O 1
// ndm_reset_client_request_get O 1 reg
// RDY_ndm_reset_client_request_get O 1 reg
// RDY_ndm_reset_client_response_put O 1 reg
// master_awvalid O 1 reg
// master_awid O 4 reg
// master_awaddr O 64 reg
// master_awlen O 8 reg
@@ -37,13 +41,12 @@
// master_awprot O 3 reg
// master_awqos O 4 reg
// master_awregion O 4 reg
// master_wvalid O 1
// master_wid O 4 reg
// master_wvalid O 1 reg
// master_wdata O 64 reg
// master_wstrb O 8 reg
// master_wlast O 1 reg
// master_bready O 1 const
// master_arvalid O 1
// master_bready O 1 reg
// master_arvalid O 1 reg
// master_arid O 4 reg
// master_araddr O 64 reg
// master_arlen O 8 reg
@@ -54,16 +57,18 @@
// master_arprot O 3 reg
// master_arqos O 4 reg
// master_arregion O 4 reg
// master_rready O 1
// master_rready O 1 reg
// CLK I 1 clock
// RST_N I 1 reset
// dmi_read_addr_dm_addr I 7
// dmi_write_dm_addr I 7
// dmi_write_dm_word I 32
// hart0_reset_client_response_put I 1 reg
// hart0_client_run_halt_response_put I 1 reg
// hart0_gpr_mem_client_response_put I 65 reg
// hart0_fpr_mem_client_response_put I 65 reg
// hart0_csr_mem_client_response_put I 65 reg
// ndm_reset_client_response_put I 1 reg
// master_awready I 1
// master_wready I 1
// master_bvalid I 1
@@ -77,28 +82,24 @@
// master_rlast I 1 reg
// EN_dmi_read_addr I 1
// EN_dmi_write I 1
// EN_hart0_get_reset_req_get I 1
// EN_hart0_reset_client_response_put I 1
// EN_hart0_client_run_halt_response_put I 1
// EN_hart0_gpr_mem_client_response_put I 1
// EN_hart0_fpr_mem_client_response_put I 1
// EN_hart0_csr_mem_client_response_put I 1
// EN_get_ndm_reset_req_get I 1
// EN_ndm_reset_client_response_put I 1
// EN_dmi_read_data I 1
// EN_hart0_reset_client_request_get I 1
// EN_hart0_client_run_halt_request_get I 1
// EN_hart0_get_other_req_get I 1
// EN_hart0_gpr_mem_client_request_get I 1
// EN_hart0_fpr_mem_client_request_get I 1
// EN_hart0_csr_mem_client_request_get I 1
// EN_ndm_reset_client_request_get I 1
//
// Combinational paths from inputs to outputs:
// (dmi_read_addr_dm_addr,
// master_arready,
// EN_dmi_read_addr) -> RDY_dmi_read_data
// (dmi_read_addr_dm_addr,
// master_arready,
// EN_dmi_read_addr,
// EN_dmi_read_data) -> dmi_read_data
// (master_awready, master_wready, master_arready) -> RDY_dmi_write
// (dmi_read_addr_dm_addr, EN_dmi_read_addr) -> RDY_dmi_read_data
// (dmi_read_addr_dm_addr, EN_dmi_read_addr, EN_dmi_read_data) -> dmi_read_data
//
//
@@ -131,8 +132,13 @@ module mkDebug_Module(CLK,
EN_dmi_write,
RDY_dmi_write,
EN_hart0_get_reset_req_get,
RDY_hart0_get_reset_req_get,
EN_hart0_reset_client_request_get,
hart0_reset_client_request_get,
RDY_hart0_reset_client_request_get,
hart0_reset_client_response_put,
EN_hart0_reset_client_response_put,
RDY_hart0_reset_client_response_put,
EN_hart0_client_run_halt_request_get,
hart0_client_run_halt_request_get,
@@ -170,8 +176,13 @@ module mkDebug_Module(CLK,
EN_hart0_csr_mem_client_response_put,
RDY_hart0_csr_mem_client_response_put,
EN_get_ndm_reset_req_get,
RDY_get_ndm_reset_req_get,
EN_ndm_reset_client_request_get,
ndm_reset_client_request_get,
RDY_ndm_reset_client_request_get,
ndm_reset_client_response_put,
EN_ndm_reset_client_response_put,
RDY_ndm_reset_client_response_put,
master_awvalid,
@@ -199,8 +210,6 @@ module mkDebug_Module(CLK,
master_wvalid,
master_wid,
master_wdata,
master_wstrb,
@@ -265,9 +274,15 @@ module mkDebug_Module(CLK,
input EN_dmi_write;
output RDY_dmi_write;
// action method hart0_get_reset_req_get
input EN_hart0_get_reset_req_get;
output RDY_hart0_get_reset_req_get;
// actionvalue method hart0_reset_client_request_get
input EN_hart0_reset_client_request_get;
output hart0_reset_client_request_get;
output RDY_hart0_reset_client_request_get;
// action method hart0_reset_client_response_put
input hart0_reset_client_response_put;
input EN_hart0_reset_client_response_put;
output RDY_hart0_reset_client_response_put;
// actionvalue method hart0_client_run_halt_request_get
input EN_hart0_client_run_halt_request_get;
@@ -314,9 +329,15 @@ module mkDebug_Module(CLK,
input EN_hart0_csr_mem_client_response_put;
output RDY_hart0_csr_mem_client_response_put;
// action method get_ndm_reset_req_get
input EN_get_ndm_reset_req_get;
output RDY_get_ndm_reset_req_get;
// actionvalue method ndm_reset_client_request_get
input EN_ndm_reset_client_request_get;
output ndm_reset_client_request_get;
output RDY_ndm_reset_client_request_get;
// action method ndm_reset_client_response_put
input ndm_reset_client_response_put;
input EN_ndm_reset_client_response_put;
output RDY_ndm_reset_client_response_put;
// value method master_m_awvalid
output master_awvalid;
@@ -359,9 +380,6 @@ module mkDebug_Module(CLK,
// value method master_m_wvalid
output master_wvalid;
// value method master_m_wid
output [3 : 0] master_wid;
// value method master_m_wdata
output [63 : 0] master_wdata;
@@ -447,14 +465,12 @@ module mkDebug_Module(CLK,
master_awcache,
master_awid,
master_awqos,
master_awregion,
master_wid;
master_awregion;
wire [2 : 0] master_arprot, master_arsize, master_awprot, master_awsize;
wire [1 : 0] master_arburst, master_awburst;
wire RDY_dmi_read_addr,
RDY_dmi_read_data,
RDY_dmi_write,
RDY_get_ndm_reset_req_get,
RDY_hart0_client_run_halt_request_get,
RDY_hart0_client_run_halt_response_put,
RDY_hart0_csr_mem_client_request_get,
@@ -462,10 +478,14 @@ module mkDebug_Module(CLK,
RDY_hart0_fpr_mem_client_request_get,
RDY_hart0_fpr_mem_client_response_put,
RDY_hart0_get_other_req_get,
RDY_hart0_get_reset_req_get,
RDY_hart0_gpr_mem_client_request_get,
RDY_hart0_gpr_mem_client_response_put,
RDY_hart0_reset_client_request_get,
RDY_hart0_reset_client_response_put,
RDY_ndm_reset_client_request_get,
RDY_ndm_reset_client_response_put,
hart0_client_run_halt_request_get,
hart0_reset_client_request_get,
master_arlock,
master_arvalid,
master_awlock,
@@ -473,7 +493,8 @@ module mkDebug_Module(CLK,
master_bready,
master_rready,
master_wlast,
master_wvalid;
master_wvalid,
ndm_reset_client_request_get;
// inlined wires
wire [7 : 0] f_read_addr_rv$port0__write_1,
@@ -517,22 +538,30 @@ module mkDebug_Module(CLK,
wire [6 : 0] dm_run_control$av_read_dm_addr, dm_run_control$write_dm_addr;
wire [3 : 0] dm_run_control$hart0_get_other_req_get;
wire dm_run_control$EN_av_read,
dm_run_control$EN_get_ndm_reset_req_get,
dm_run_control$EN_hart0_client_run_halt_request_get,
dm_run_control$EN_hart0_client_run_halt_response_put,
dm_run_control$EN_hart0_get_other_req_get,
dm_run_control$EN_hart0_get_reset_req_get,
dm_run_control$EN_hart0_reset_client_request_get,
dm_run_control$EN_hart0_reset_client_response_put,
dm_run_control$EN_ndm_reset_client_request_get,
dm_run_control$EN_ndm_reset_client_response_put,
dm_run_control$EN_reset,
dm_run_control$EN_write,
dm_run_control$RDY_get_ndm_reset_req_get,
dm_run_control$RDY_hart0_client_run_halt_request_get,
dm_run_control$RDY_hart0_client_run_halt_response_put,
dm_run_control$RDY_hart0_get_other_req_get,
dm_run_control$RDY_hart0_get_reset_req_get,
dm_run_control$RDY_hart0_reset_client_request_get,
dm_run_control$RDY_hart0_reset_client_response_put,
dm_run_control$RDY_ndm_reset_client_request_get,
dm_run_control$RDY_ndm_reset_client_response_put,
dm_run_control$RDY_write,
dm_run_control$dmactive,
dm_run_control$hart0_client_run_halt_request_get,
dm_run_control$hart0_client_run_halt_response_put;
dm_run_control$hart0_client_run_halt_response_put,
dm_run_control$hart0_reset_client_request_get,
dm_run_control$hart0_reset_client_response_put,
dm_run_control$ndm_reset_client_request_get,
dm_run_control$ndm_reset_client_response_put;
// ports of submodule dm_system_bus
wire [63 : 0] dm_system_bus$master_araddr,
@@ -553,8 +582,7 @@ module mkDebug_Module(CLK,
dm_system_bus$master_awqos,
dm_system_bus$master_awregion,
dm_system_bus$master_bid,
dm_system_bus$master_rid,
dm_system_bus$master_wid;
dm_system_bus$master_rid;
wire [2 : 0] dm_system_bus$master_arprot,
dm_system_bus$master_arsize,
dm_system_bus$master_awprot,
@@ -588,7 +616,6 @@ module mkDebug_Module(CLK,
CAN_FIRE_dmi_read_addr,
CAN_FIRE_dmi_read_data,
CAN_FIRE_dmi_write,
CAN_FIRE_get_ndm_reset_req_get,
CAN_FIRE_hart0_client_run_halt_request_get,
CAN_FIRE_hart0_client_run_halt_response_put,
CAN_FIRE_hart0_csr_mem_client_request_get,
@@ -596,19 +623,21 @@ module mkDebug_Module(CLK,
CAN_FIRE_hart0_fpr_mem_client_request_get,
CAN_FIRE_hart0_fpr_mem_client_response_put,
CAN_FIRE_hart0_get_other_req_get,
CAN_FIRE_hart0_get_reset_req_get,
CAN_FIRE_hart0_gpr_mem_client_request_get,
CAN_FIRE_hart0_gpr_mem_client_response_put,
CAN_FIRE_hart0_reset_client_request_get,
CAN_FIRE_hart0_reset_client_response_put,
CAN_FIRE_master_m_arready,
CAN_FIRE_master_m_awready,
CAN_FIRE_master_m_bvalid,
CAN_FIRE_master_m_rvalid,
CAN_FIRE_master_m_wready,
CAN_FIRE_ndm_reset_client_request_get,
CAN_FIRE_ndm_reset_client_response_put,
WILL_FIRE_RL_rl_reset,
WILL_FIRE_dmi_read_addr,
WILL_FIRE_dmi_read_data,
WILL_FIRE_dmi_write,
WILL_FIRE_get_ndm_reset_req_get,
WILL_FIRE_hart0_client_run_halt_request_get,
WILL_FIRE_hart0_client_run_halt_response_put,
WILL_FIRE_hart0_csr_mem_client_request_get,
@@ -616,19 +645,22 @@ module mkDebug_Module(CLK,
WILL_FIRE_hart0_fpr_mem_client_request_get,
WILL_FIRE_hart0_fpr_mem_client_response_put,
WILL_FIRE_hart0_get_other_req_get,
WILL_FIRE_hart0_get_reset_req_get,
WILL_FIRE_hart0_gpr_mem_client_request_get,
WILL_FIRE_hart0_gpr_mem_client_response_put,
WILL_FIRE_hart0_reset_client_request_get,
WILL_FIRE_hart0_reset_client_response_put,
WILL_FIRE_master_m_arready,
WILL_FIRE_master_m_awready,
WILL_FIRE_master_m_bvalid,
WILL_FIRE_master_m_rvalid,
WILL_FIRE_master_m_wready;
WILL_FIRE_master_m_wready,
WILL_FIRE_ndm_reset_client_request_get,
WILL_FIRE_ndm_reset_client_response_put;
// declarations used by system tasks
// synopsys translate_off
reg [31 : 0] v__h887;
reg [31 : 0] v__h881;
reg [31 : 0] v__h911;
reg [31 : 0] v__h905;
// synopsys translate_on
// action method dmi_read_addr
@@ -705,12 +737,23 @@ module mkDebug_Module(CLK,
dm_run_control$RDY_write && dm_system_bus$RDY_write ;
assign WILL_FIRE_dmi_write = EN_dmi_write ;
// action method hart0_get_reset_req_get
assign RDY_hart0_get_reset_req_get =
dm_run_control$RDY_hart0_get_reset_req_get ;
assign CAN_FIRE_hart0_get_reset_req_get =
dm_run_control$RDY_hart0_get_reset_req_get ;
assign WILL_FIRE_hart0_get_reset_req_get = EN_hart0_get_reset_req_get ;
// actionvalue method hart0_reset_client_request_get
assign hart0_reset_client_request_get =
dm_run_control$hart0_reset_client_request_get ;
assign RDY_hart0_reset_client_request_get =
dm_run_control$RDY_hart0_reset_client_request_get ;
assign CAN_FIRE_hart0_reset_client_request_get =
dm_run_control$RDY_hart0_reset_client_request_get ;
assign WILL_FIRE_hart0_reset_client_request_get =
EN_hart0_reset_client_request_get ;
// action method hart0_reset_client_response_put
assign RDY_hart0_reset_client_response_put =
dm_run_control$RDY_hart0_reset_client_response_put ;
assign CAN_FIRE_hart0_reset_client_response_put =
dm_run_control$RDY_hart0_reset_client_response_put ;
assign WILL_FIRE_hart0_reset_client_response_put =
EN_hart0_reset_client_response_put ;
// actionvalue method hart0_client_run_halt_request_get
assign hart0_client_run_halt_request_get =
@@ -792,12 +835,23 @@ module mkDebug_Module(CLK,
assign WILL_FIRE_hart0_csr_mem_client_response_put =
EN_hart0_csr_mem_client_response_put ;
// action method get_ndm_reset_req_get
assign RDY_get_ndm_reset_req_get =
dm_run_control$RDY_get_ndm_reset_req_get ;
assign CAN_FIRE_get_ndm_reset_req_get =
dm_run_control$RDY_get_ndm_reset_req_get ;
assign WILL_FIRE_get_ndm_reset_req_get = EN_get_ndm_reset_req_get ;
// actionvalue method ndm_reset_client_request_get
assign ndm_reset_client_request_get =
dm_run_control$ndm_reset_client_request_get ;
assign RDY_ndm_reset_client_request_get =
dm_run_control$RDY_ndm_reset_client_request_get ;
assign CAN_FIRE_ndm_reset_client_request_get =
dm_run_control$RDY_ndm_reset_client_request_get ;
assign WILL_FIRE_ndm_reset_client_request_get =
EN_ndm_reset_client_request_get ;
// action method ndm_reset_client_response_put
assign RDY_ndm_reset_client_response_put =
dm_run_control$RDY_ndm_reset_client_response_put ;
assign CAN_FIRE_ndm_reset_client_response_put =
dm_run_control$RDY_ndm_reset_client_response_put ;
assign WILL_FIRE_ndm_reset_client_response_put =
EN_ndm_reset_client_response_put ;
// value method master_m_awvalid
assign master_awvalid = dm_system_bus$master_awvalid ;
@@ -839,9 +893,6 @@ module mkDebug_Module(CLK,
// value method master_m_wvalid
assign master_wvalid = dm_system_bus$master_wvalid ;
// value method master_m_wid
assign master_wid = dm_system_bus$master_wid ;
// value method master_m_wdata
assign master_wdata = dm_system_bus$master_wdata ;
@@ -943,29 +994,37 @@ module mkDebug_Module(CLK,
.RST_N(RST_N),
.av_read_dm_addr(dm_run_control$av_read_dm_addr),
.hart0_client_run_halt_response_put(dm_run_control$hart0_client_run_halt_response_put),
.hart0_reset_client_response_put(dm_run_control$hart0_reset_client_response_put),
.ndm_reset_client_response_put(dm_run_control$ndm_reset_client_response_put),
.write_dm_addr(dm_run_control$write_dm_addr),
.write_dm_word(dm_run_control$write_dm_word),
.EN_reset(dm_run_control$EN_reset),
.EN_av_read(dm_run_control$EN_av_read),
.EN_write(dm_run_control$EN_write),
.EN_hart0_get_reset_req_get(dm_run_control$EN_hart0_get_reset_req_get),
.EN_hart0_reset_client_request_get(dm_run_control$EN_hart0_reset_client_request_get),
.EN_hart0_reset_client_response_put(dm_run_control$EN_hart0_reset_client_response_put),
.EN_hart0_client_run_halt_request_get(dm_run_control$EN_hart0_client_run_halt_request_get),
.EN_hart0_client_run_halt_response_put(dm_run_control$EN_hart0_client_run_halt_response_put),
.EN_hart0_get_other_req_get(dm_run_control$EN_hart0_get_other_req_get),
.EN_get_ndm_reset_req_get(dm_run_control$EN_get_ndm_reset_req_get),
.EN_ndm_reset_client_request_get(dm_run_control$EN_ndm_reset_client_request_get),
.EN_ndm_reset_client_response_put(dm_run_control$EN_ndm_reset_client_response_put),
.dmactive(dm_run_control$dmactive),
.RDY_dmactive(),
.RDY_reset(),
.av_read(dm_run_control$av_read),
.RDY_av_read(),
.RDY_write(dm_run_control$RDY_write),
.RDY_hart0_get_reset_req_get(dm_run_control$RDY_hart0_get_reset_req_get),
.hart0_reset_client_request_get(dm_run_control$hart0_reset_client_request_get),
.RDY_hart0_reset_client_request_get(dm_run_control$RDY_hart0_reset_client_request_get),
.RDY_hart0_reset_client_response_put(dm_run_control$RDY_hart0_reset_client_response_put),
.hart0_client_run_halt_request_get(dm_run_control$hart0_client_run_halt_request_get),
.RDY_hart0_client_run_halt_request_get(dm_run_control$RDY_hart0_client_run_halt_request_get),
.RDY_hart0_client_run_halt_response_put(dm_run_control$RDY_hart0_client_run_halt_response_put),
.hart0_get_other_req_get(dm_run_control$hart0_get_other_req_get),
.RDY_hart0_get_other_req_get(dm_run_control$RDY_hart0_get_other_req_get),
.RDY_get_ndm_reset_req_get(dm_run_control$RDY_get_ndm_reset_req_get));
.ndm_reset_client_request_get(dm_run_control$ndm_reset_client_request_get),
.RDY_ndm_reset_client_request_get(dm_run_control$RDY_ndm_reset_client_request_get),
.RDY_ndm_reset_client_response_put(dm_run_control$RDY_ndm_reset_client_response_put));
// submodule dm_system_bus
mkDM_System_Bus dm_system_bus(.CLK(CLK),
@@ -1003,7 +1062,6 @@ module mkDebug_Module(CLK,
.master_awqos(dm_system_bus$master_awqos),
.master_awregion(dm_system_bus$master_awregion),
.master_wvalid(dm_system_bus$master_wvalid),
.master_wid(dm_system_bus$master_wid),
.master_wdata(dm_system_bus$master_wdata),
.master_wstrb(dm_system_bus$master_wstrb),
.master_wlast(dm_system_bus$master_wlast),
@@ -1100,6 +1158,10 @@ module mkDebug_Module(CLK,
assign dm_run_control$av_read_dm_addr = f_read_addr_rv$port1__read[6:0] ;
assign dm_run_control$hart0_client_run_halt_response_put =
hart0_client_run_halt_response_put ;
assign dm_run_control$hart0_reset_client_response_put =
hart0_reset_client_response_put ;
assign dm_run_control$ndm_reset_client_response_put =
ndm_reset_client_response_put ;
assign dm_run_control$write_dm_addr = dmi_write_dm_addr ;
assign dm_run_control$write_dm_word = dmi_write_dm_word ;
assign dm_run_control$EN_reset = WILL_FIRE_RL_rl_reset ;
@@ -1128,15 +1190,20 @@ module mkDebug_Module(CLK,
dmi_write_dm_addr == 7'h40 ||
dmi_write_dm_addr == 7'h5F ||
dmi_write_dm_addr == 7'h60) ;
assign dm_run_control$EN_hart0_get_reset_req_get =
EN_hart0_get_reset_req_get ;
assign dm_run_control$EN_hart0_reset_client_request_get =
EN_hart0_reset_client_request_get ;
assign dm_run_control$EN_hart0_reset_client_response_put =
EN_hart0_reset_client_response_put ;
assign dm_run_control$EN_hart0_client_run_halt_request_get =
EN_hart0_client_run_halt_request_get ;
assign dm_run_control$EN_hart0_client_run_halt_response_put =
EN_hart0_client_run_halt_response_put ;
assign dm_run_control$EN_hart0_get_other_req_get =
EN_hart0_get_other_req_get ;
assign dm_run_control$EN_get_ndm_reset_req_get = EN_get_ndm_reset_req_get ;
assign dm_run_control$EN_ndm_reset_client_request_get =
EN_ndm_reset_client_request_get ;
assign dm_run_control$EN_ndm_reset_client_response_put =
EN_ndm_reset_client_response_put ;
// submodule dm_system_bus
assign dm_system_bus$av_read_dm_addr = f_read_addr_rv$port1__read[6:0] ;
@@ -1208,12 +1275,12 @@ module mkDebug_Module(CLK,
if (RST_N != `BSV_RESET_VALUE)
if (WILL_FIRE_RL_rl_reset)
begin
v__h887 = $stime;
v__h911 = $stime;
#0;
end
v__h881 = v__h887 / 32'd10;
v__h905 = v__h911 / 32'd10;
if (RST_N != `BSV_RESET_VALUE)
if (WILL_FIRE_RL_rl_reset) $display("%0d: Debug_Module reset", v__h881);
if (WILL_FIRE_RL_rl_reset) $display("%0d: Debug_Module reset", v__h905);
end
// synopsys translate_on
endmodule // mkDebug_Module