Small fixes to allow booting from any IO address, including Flash, not just Boot ROM

Regression status: RV64ADFIMSU_Toooba_verilator  204/229 PASS
      (22 expected floating-point failures due to inaccurate modeling)

  Modified
    src_Core/RISCY_OOO/procs/lib/MMIOInst.bsv
        Renamed 'BootRom' to 'IODevice'
        Imported and instantiated SoC_Map
        changed method getFetchTarget to use soc_map.is_IO_addr (phyPC)
        to classify as IODevice

    src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
        Changed 'BootRom' constant to 'IODevice' constant (just a renaming)

    src_Testbench/SoC/SoC_Map.bsv
        Changed boot rom classification from 'mem' to 'IO device'
This commit is contained in:
rsnikhil
2019-04-10 15:36:20 -04:00
parent 3d4960edc5
commit f369ed14e3
11 changed files with 1258 additions and 1184 deletions

View File

@@ -478,7 +478,7 @@ module mkFetchStage(FetchStage);
// Send ICache request
mem_server.request.put(phys_pc);
end
BootRom: begin
IODevice: begin
// Send MMIO req. Luckily boot rom is also aligned with
// cache line size, so all nbSup+1 insts can be fetched
// from boot rom. It won't happen that insts fetched from

View File

@@ -30,6 +30,8 @@ import CCTypes::*;
import CacheUtils::*;
import MMIOAddrs::*;
import SoC_Map :: *; // Bluespec setup
interface MMIOInstToCore;
interface FifoDeq#(Tuple2#(Addr, SupWaySel)) instReq;
interface FifoEnq#(Vector#(SupSize, Maybe#(Instruction))) instResp;
@@ -38,7 +40,7 @@ endinterface
typedef enum {
MainMem,
BootRom,
IODevice, // BootRom, Flash, ... (Bluespec setup)
Fault
} InstFetchTarget deriving(Bits, Eq, FShow);
@@ -71,10 +73,12 @@ module mkMMIOInst(MMIOInst);
// respQ, no affecting other MMIO accesses.
Fifo#(1, void) pendQ <- mkCFFifo;
SoC_Map_IFC soc_map <- mkSoC_Map; // Bluespec setup
method InstFetchTarget getFetchTarget(Addr phyPc);
let addr = getDataAlignedAddr(phyPc);
if(addr >= bootRomBaseAddr && addr < bootRomBoundAddr) begin
return BootRom;
if (soc_map.m_is_IO_addr (phyPc)) begin
return IODevice;
end
else if(addr >= mainMemBaseAddr && (addr < mainMemBoundAddr) &&
addr != toHostAddr && addr != fromHostAddr) begin