Small fixes to allow booting from any IO address, including Flash, not just Boot ROM
Regression status: RV64ADFIMSU_Toooba_verilator 204/229 PASS
(22 expected floating-point failures due to inaccurate modeling)
Modified
src_Core/RISCY_OOO/procs/lib/MMIOInst.bsv
Renamed 'BootRom' to 'IODevice'
Imported and instantiated SoC_Map
changed method getFetchTarget to use soc_map.is_IO_addr (phyPC)
to classify as IODevice
src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
Changed 'BootRom' constant to 'IODevice' constant (just a renaming)
src_Testbench/SoC/SoC_Map.bsv
Changed boot rom classification from 'mem' to 'IO device'
This commit is contained in:
@@ -478,7 +478,7 @@ module mkFetchStage(FetchStage);
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// Send ICache request
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mem_server.request.put(phys_pc);
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end
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BootRom: begin
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IODevice: begin
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// Send MMIO req. Luckily boot rom is also aligned with
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// cache line size, so all nbSup+1 insts can be fetched
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// from boot rom. It won't happen that insts fetched from
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@@ -30,6 +30,8 @@ import CCTypes::*;
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import CacheUtils::*;
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import MMIOAddrs::*;
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import SoC_Map :: *; // Bluespec setup
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interface MMIOInstToCore;
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interface FifoDeq#(Tuple2#(Addr, SupWaySel)) instReq;
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interface FifoEnq#(Vector#(SupSize, Maybe#(Instruction))) instResp;
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@@ -38,7 +40,7 @@ endinterface
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typedef enum {
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MainMem,
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BootRom,
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IODevice, // BootRom, Flash, ... (Bluespec setup)
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Fault
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} InstFetchTarget deriving(Bits, Eq, FShow);
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@@ -71,10 +73,12 @@ module mkMMIOInst(MMIOInst);
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// respQ, no affecting other MMIO accesses.
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Fifo#(1, void) pendQ <- mkCFFifo;
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SoC_Map_IFC soc_map <- mkSoC_Map; // Bluespec setup
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method InstFetchTarget getFetchTarget(Addr phyPc);
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let addr = getDataAlignedAddr(phyPc);
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if(addr >= bootRomBaseAddr && addr < bootRomBoundAddr) begin
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return BootRom;
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if (soc_map.m_is_IO_addr (phyPc)) begin
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return IODevice;
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end
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else if(addr >= mainMemBaseAddr && (addr < mainMemBoundAddr) &&
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addr != toHostAddr && addr != fromHostAddr) begin
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