Fix bug; consistently treat mepc as the offset of mepcc.
Also remove PCC from the SCR file.
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@@ -85,7 +85,6 @@ interface ScrFile;
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// normal write by RWSpecialCap inst to any SCR
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method Action scrInstWr(SCR csr, CapReg x);
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interface Vector#(SupSize, Put#(CapReg)) pccWr;
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// The WARL transform performed during CSRRx writes to a CSR
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method CapReg warl_xform (SCR csr, CapReg x);
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@@ -95,9 +94,7 @@ interface ScrFile;
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method ActionValue#(Scr_RET_Updates) mret;
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// Outputs for CSRs that the rest of the processor needs to know about
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method ScrVMInfo pccCheck;
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method ScrVMInfo ddcCheck;
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method ScrDecodeInfo decodeInfo;
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// terminate
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method ActionValue#(void) terminate;
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@@ -136,7 +133,7 @@ module mkScrFile (ScrFile);
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let mkCsrEhr = mkConfigEhr;
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// User level SCRs
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Ehr#(SupSize, CapReg) pcc_reg <- mkConfigEhr(defaultValue);
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// PCC is implemented in the pipeline.
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Reg#(CapReg) ddc_reg <- mkCsrReg(defaultValue);
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// User level SCRs with accessSysRegs
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@@ -161,7 +158,7 @@ module mkScrFile (ScrFile);
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function Reg#(CapReg) get_scr(SCR scr);
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return (case (scr)
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// User SCRs
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SCR_PCC: pcc_reg[0];
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//SCR_PCC: $error("PCC does not actually live in the Special Capability Register File!");
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SCR_DDC: ddc_reg;
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// User CSRs with accessSysRegs
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// SCR_UTCC: utcc_reg;
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@@ -192,11 +189,8 @@ module mkScrFile (ScrFile);
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get_scr(csr)._write(x);
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endmethod
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interface pccWr = map(toPut,pcc_reg);
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method ActionValue#(Scr_Trap_Updates) trap(CapPipe pc, Bit#(2) prv);
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mepcc_reg[0] <= cast(pc);
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pcc_reg[0] <= mtcc_reg;
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return Scr_Trap_Updates{new_pcc: cast(mtcc_reg)};
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endmethod
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@@ -208,14 +202,6 @@ module mkScrFile (ScrFile);
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return Scr_RET_Updates{new_pcc: cast(mepcc_reg[0])};
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endmethod
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method ScrVMInfo pccCheck;
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return ScrVMInfo {
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top: truncate(getTop(pcc_reg[0])),
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base: truncate(getBase(pcc_reg[0])),
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perms: getHardPerms(pcc_reg[0])
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};
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endmethod
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method ScrVMInfo ddcCheck;
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// for load/store, need to consider MPRV
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return ScrVMInfo {
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@@ -225,7 +211,4 @@ module mkScrFile (ScrFile);
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};
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endmethod
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method ScrDecodeInfo decodeInfo =
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ScrDecodeInfo{cap_mode: getFlags(pcc_reg[0])==1'b1};
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endmodule
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@@ -729,7 +729,7 @@ module mkCommitStage#(CommitInput inIfc)(CommitStage);
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: 1));
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csrf.dcsr_cause_write (dcsr_cause);
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csrf.dpc_write (trap.pc);
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scaprfIfc.trap(trap.pc,?);
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scaprfIfc.trap (trap.pc,?);
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// Tell fetch stage to wait for redirect
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// Note: rule doCommitTrap_flush may have done this already; redundant call is ok.
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@@ -746,7 +746,8 @@ module mkCommitStage#(CommitInput inIfc)(CommitStage);
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if (! debugger_halt) begin
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// trap handling & redirect
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let trap_updates <- csrf.trap(trap.trap, getAddr(trap.pc), trap.addr, trap.orig_inst);
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CapPipe cp = cast(trap.pc);
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let trap_updates <- csrf.trap(trap.trap, getOffset(cp), trap.addr, trap.orig_inst);
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let cap_trap_updates <- scaprf.trap(cast(trap.pc), ?);
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CapPipe new_pc = setOffset(cast(cap_trap_updates.new_pcc), trap_updates.new_pc).value;
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inIfc.redirectPc(cast(new_pc)
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@@ -1096,9 +1097,6 @@ module mkCommitStage#(CommitInput inIfc)(CommitStage);
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regRenamingTable.commit[i].commit;
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doAssert(x.claimed_phy_reg, "should have renamed");
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if (x.ppc_vaddr_csrData matches tagged PPC .ppc)
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scaprf.pccWr[i].put(cast(ppc));
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`ifdef RENAME_DEBUG
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// send debug msg for rename error
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if(!x.claimed_phy_reg && !isValid(renameError)) begin
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