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Adapt the PLIC instantiation and wiring to support multiple cores

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This commit is contained in:
Jessica Clarke
2020-10-16 16:14:24 +01:00
committed by Peter Rugg
parent cedb4c279d
commit fb5339e9ca
7 changed files with 36 additions and 25 deletions
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6
src_Core/CPU/Proc.bsv
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@@ -296,11 +296,13 @@ module mkProc (Proc_IFC);
// External interrupts
method Action m_external_interrupt_req (x);
core[0].setMEIP (pack (x));
for(Integer i = 0; i < valueof(CoreNum); i = i+1)
core[i].setMEIP (pack (x[i]));
endmethod
method Action s_external_interrupt_req (x);
core[0].setSEIP (pack (x));
for(Integer i = 0; i < valueof(CoreNum); i = i+1)
core[i].setSEIP (pack (x[i]));
endmethod
// ----------------

6
src_Core/CPU/Proc_IFC.bsv
View File

@@ -27,6 +27,8 @@ import ClientServer :: *;
// ================================================================
// Project imports
import ProcTypes :: *;
import ISA_Decls :: *;
import AXI4 :: *;
@@ -75,10 +77,10 @@ interface Proc_IFC;
// External interrupts
(* always_ready, always_enabled *)
method Action m_external_interrupt_req (Bool set_not_clear);
method Action m_external_interrupt_req (Vector #(CoreNum, Bool) set_not_clear);
(* always_ready, always_enabled *)
method Action s_external_interrupt_req (Bool set_not_clear);
method Action s_external_interrupt_req (Vector #(CoreNum, Bool) set_not_clear);
// ----------------
// Non-maskable interrupt