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Adapt the PLIC instantiation and wiring to support multiple cores

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This commit is contained in:
Jessica Clarke
2020-10-16 16:14:24 +01:00
committed by Peter Rugg
parent cedb4c279d
commit fb5339e9ca
7 changed files with 36 additions and 25 deletions
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14
src_Core/PLIC/PLIC_16_2_7.bsv → src_Core/PLIC/PLIC_16_CoreNumX2_7.bsv
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@@ -13,7 +13,7 @@
// This work was supported by NCSC programme grant 4212611/RFA 15971 ("SafeBet").
//-
package PLIC_16_2_7;
package PLIC_16_CoreNumX2_7;
// ================================================================
// Instantiation of parameterized PLIC to specific parameter values.
@@ -31,21 +31,23 @@ package PLIC_16_2_7;
// ================================================================
// Project imports
import ProcTypes :: *; // For CoreNum
import SoC_Map :: *; // For N_External_Interrupt_Sources
import PLIC :: *; // For PLIC_IFC, mkPLIC
// ================================================================
// PLIC for this core
typedef 2 PLIC_N_Targets;
typedef 7 PLIC_Max_Priority;
typedef TMul #(CoreNum, 2) PLIC_N_Targets;
typedef 7 PLIC_Max_Priority;
typedef PLIC_IFC #(N_External_Interrupt_Sources,
PLIC_N_Targets,
PLIC_Max_Priority) PLIC_IFC_16_2_7;
PLIC_N_Targets,
PLIC_Max_Priority) PLIC_IFC_16_CoreNumX2_7;
(* synthesize *)
module mkPLIC_16_2_7 (PLIC_IFC_16_2_7);
module mkPLIC_16_CoreNumX2_7 (PLIC_IFC_16_CoreNumX2_7);
let m <- mkPLIC;
return m;
endmodule

7
src_Core/PLIC/Test_PLIC.bsv
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@@ -44,8 +44,9 @@ import AXI4_Types :: *;
import AXI4_Fabric :: *;
import Fabric_Defs :: *; // for Wd_Id, Wd_Addr, Wd_Data, Wd_User
import SoC_Map :: *;
import PLIC :: *;
import PLIC_16_2_7 :: *;
import PLIC :: *;
import PLIC_16_CoreNumX2_7 :: *;
// ================================================================
@@ -70,7 +71,7 @@ module mkTest_PLIC (Empty);
SoC_Map_IFC soc_map <- mkSoC_Map;
// PLIC (Platform-Level Interrupt Controller)
PLIC_IFC_16_2_7 plic <- mkPLIC_16_2_7;
PLIC_IFC_16_CoreNumX2_7 plic <- mkPLIC_16_CoreNumX2_7;
// Master transactor through which to read/write PLIC regs
AXI4_Master_Xactor_IFC #(Wd_Id, Wd_Addr, Wd_Data, Wd_User) master_xactor <- mkAXI4_Master_Xactor;