Whilst the current PLIC spec is hard to decipher, the older v1.9
privileged spec is clearer. The intent is that each interrupt is
independent and so claims and completions can be overlapped (e.g. as
done by FreeBSD if deferring an interrupt handler). This is
approximately expressed in the spec by:
The PLIC can perform a claim at any time and the claim operation is
not affected by the setting of the priority threshold register.
...
The PLIC does not check whether the completion ID is the same as the
last claim ID for that target. If the completion ID does not match an
interrupt source that is currently enabled for the target, the
completion is silently ignored.
Thost last two sentences make it sound like the completion ID not
matching the last claim ID is a thing to ignore, but in fact they are
entirely independent statements. This can be confirmed by reading the
source for the Rocket and QEMU PLICs, which have none of the stricter
requirements of the Bluespec PLIC implementation.
This should fix running FreeBSD after r362977, which started to
correctly delay the completion of interrupts until after deferred
handlers had completed (as opposed to after they had been queued).
PLIC: updated to latest version from Piccolo/Flute.
MMIO_AXI4_Adapter: added workaround for Xilinx IP problem on 64-bit
AXI4 fabrics. Writes that specify 8-byte size, but only write in
upper or lower word using strobes, are converted into 4-byte size.
Core.bsv: added a notification to the Debug Module re. CPU halt.
