Jonathan Woodruff
a299a763ed
Add a special capability register file and pass it's interfaces to all the places that the current CSR file goes.
...
We may need to trim some of these later, but most of them seem like places that we'll need access.
2020-03-23 10:10:11 +00:00
Jonathan Woodruff
c97ee15851
A couple initial files with beginnings of CHERI support.
2020-03-20 15:34:18 +00:00
rsnikhil
b00f1d2eec
Fixed a Tandem Verification trace generation bug for FMV.X.F and FMV.X.D
...
We were reporting the incremental value of fflags (=0)
instead of the final value of fflags (same as pre-value, which may not be 0).
2020-03-09 14:47:20 -04:00
rsnikhil
976494a8ff
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
...
When a CSRRx instruction writes to FCSR/FFLAGS/FRM, the CPU also
changes MSTATUS.FS and, by implication, MSTATUS.SD because the
floating point state has become "dirty". Tandem Verification
trace-generation was not reporting this update.
2020-03-08 21:29:30 -04:00
rsnikhil
6078b7ce19
Removed EXTERNAL_DEBUG_MODULE stuff from CoreW.bsv; added Tandem Verif control flow
2020-01-29 13:19:31 -05:00
rsnikhil
ee24a93944
Initial load of files
2019-03-26 14:49:40 -04:00
