jon
078d39b9df
Enable write bursts in LLC AXI4 adapter.
2020-06-02 09:40:37 +01:00
jon
ffeed959a3
Believed-to-be-working attaching of tags to write bursts in the AXI4 LLC
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wrapper.
2020-05-28 18:21:03 +01:00
Alexandre Joannou
b70498e00a
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
Alexandre Joannou
b5b2b4fe5c
Port AXI4 changes from Flute
2020-03-27 16:45:26 +00:00
Jonathan Woodruff
2aa902f61a
Change tabs to 8 spaces, this time being careful to do this only in BSV files.
2020-03-23 14:44:39 +00:00
Jonathan Woodruff
a6e5a7bff0
Revert "Fix whitespace in src_Core directory."
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This reverts commit a137a6ede7
2020-03-23 14:40:02 +00:00
Jonathan Woodruff
a137a6ede7
Fix whitespace in src_Core directory.
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Replace all tabs with 8 spaces.
2020-03-23 14:28:00 +00:00
rsnikhil
83829590dd
Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
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Now able to run multiple ISA tests in a single simulation run
connected to remote debugger DSharp, using either hart_reset or
ndm_reset between tests to bring the system back into reset state.
All Debug Module commands working:
- dm_reset, hart_reset, ndm_reset
- break (set breakpoint)
- step
- continue (until breakpoint of 'halt' command)
- halt
- read/write GPR, FPR, CSR, memory
- elf_load
2020-02-04 16:02:53 -05:00
rsnikhil
9f94c9176e
Added verbosity guards around $displays to dial down log verbosity
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To get the instruction trace back, set verbosity to 1 in CommitStage.bsv.
Regressions: RV64ADFIMSU_Tooba_verilator: 199/227 PASS (1 test hangs)
2019-04-01 20:35:52 -04:00
rsnikhil
ee24a93944
Initial load of files
2019-03-26 14:49:40 -04:00
