jon
dcfdb34f0a
Changes to build with the now more parameterisable TagController.
2020-06-15 16:46:15 +01:00
jon
ad66967916
Bump capability library to version with fixed mask calculation.
2020-06-12 17:21:26 +01:00
jon
d35cea017e
Bump to version allowing multiple outstanding requests.
2020-06-12 17:19:46 +01:00
jon
e08e97c17b
Use the 80000000 entry point for RVFI_DII.
2020-06-11 15:59:19 +01:00
jon
6719925b78
Fetch initial instructions from boot rom in simulation to improve
...
testing.
To make this not fail, remove the reset server behaviour in SoC_Top
which appears to not be needed as it is only calling reset servers upon
actual reset when everything has been reset anyway.
I suppose these reset servers are meant for debug-unit-initiated reset
events.
2020-06-11 10:56:07 +01:00
jon
1de6fc941e
Adjust debug output to always print certain portions as this is more
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useful.
2020-06-11 09:47:19 +01:00
jon
c96021e5f2
Just fall through to default when the upper bits are not as expected to
...
avoid lockup, though it may lockup anyway. We should respond with a bus
error or something instead.
2020-06-11 09:45:38 +01:00
jon
f582d6550b
Add BLUESIM to two simulation builds as the TagController expects this
...
variable to be set when building for simulation.
2020-06-11 09:43:38 +01:00
jon
8492136abd
Attempt to convert more functions in the MMIO platform to respect the
...
alignment of the original data.
Also eliminate the call to the reimplementation of the AMO functions.
(One call was already converted to use the common function, and I've now
converted the other.)
It's honestly unknown how much of this works, but it's more likely to
work than what was previously implemented, I think, given that the
previou implementation was based on some basic misconceptions concerning
data alignment.
2020-06-09 17:39:36 +01:00
jon
4b3f97cb6a
More correct version of select function.
...
Also the beginnings of a select function for writes which is not yet
used.
2020-06-09 12:33:43 +01:00
jon
122e98b0c7
Attempt to provide correct alignment for MMIO requests in flits returned
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to bus.
This does not yet attempt to fix writes which might likely also need
fixing.
2020-06-08 19:03:12 +01:00
Peter Rugg
3117fcc9d5
Regenerate verilog
2020-06-07 16:52:34 +01:00
Peter Rugg
4fbabae1dd
component.xml fixes for synthesis
2020-06-07 16:52:29 +01:00
jon
9ec9b34376
Don't overwrite earlier exception in Execute.
2020-06-06 09:42:11 +01:00
jon
0fa18c6b1f
Bump TagController to version that builds.
2020-06-06 09:40:48 +01:00
jon
afe61b0626
Bump tagcontroller to version which implements/optimises burst writes.
2020-06-05 19:34:13 +01:00
Peter Rugg
be2c92b291
Regenerate verilog
2020-06-05 17:49:32 +01:00
Jessica Clarke
e579f895dc
CPU_Decode_C.bsv: Sync from Flute
...
This incorporates the fix made to Piccolo and Flute to not trap on
C.FLWSP/C.FLDSP when rd == 0; unlike the compressed stack pointer
relative integer loads/stores, these are legal, since f0 is a real FPR
rather than a constant zero.
2020-06-05 17:43:26 +01:00
Peter Rugg
962ade1092
Fixes for synthesis
2020-06-05 17:40:28 +01:00
Peter Rugg
046319b909
Remove Tandem verification
2020-06-03 22:28:31 +01:00
Peter Rugg
f3a8fc44f5
Bump cheri-cap-lib
2020-06-03 12:44:13 +01:00
Peter Rugg
9aeb8f1ea9
Fix CSR read immediate case
2020-06-02 20:50:56 +01:00
jon
7612738ff5
Changes needed for working TagController in Toooba.
2020-06-02 19:05:56 +01:00
jon
4cd611ce30
Merge branch 'CHERI' of https://github.com/CTSRD-CHERI/Toooba into CHERI
2020-06-02 19:01:43 +01:00
jon
bb3eddccf2
Implement cap_mode switch for legacy loads and stores, as the mechanism
...
for decoding has changed and was not setting the new flag.
2020-06-02 19:00:28 +01:00
Peter Rugg
73a8b99c6c
Bump cheri-cap-lib
2020-06-02 10:23:09 +01:00
jon
078d39b9df
Enable write bursts in LLC AXI4 adapter.
2020-06-02 09:40:37 +01:00
jon
9bbd8dc872
Bump the tag controller version to the one needed for Toooba.
2020-06-02 09:33:35 +01:00
Peter Rugg
675de23dc2
Fix TestSubset top check the wrong way around
2020-06-01 20:23:42 +01:00
Peter Rugg
b7c73d4422
Link offset in JAL
2020-06-01 18:57:51 +01:00
Peter Rugg
1725cdda8f
Fix bug where immediate discarded too early in Scr case
2020-06-01 15:12:30 +01:00
Peter Rugg
f7deb7349b
Fix writeback when reading and writing CSR/SCR together
2020-06-01 15:04:59 +01:00
Peter Rugg
16eac986ef
Fix EPC/MTVEC updates ignoring old value
2020-06-01 12:17:14 +01:00
Peter Rugg
6a8f0e5bc0
Rename 'cap-mode' in Mem pipeline to ddc offset, since explicit memory instructions contradicting the cap_mode exist
2020-05-29 17:05:03 +01:00
Peter Rugg
a7d4d8e4a4
Fix bug where explicit cap-rel mem accesses would always trap as untagged
2020-05-29 16:43:20 +01:00
Peter Rugg
4b4b5836e8
Populate tval with CHERI trap information
2020-05-29 13:27:23 +01:00
Peter Rugg
a49d3d2b6b
Add ASR restrictions
2020-05-28 23:25:33 +01:00
jon
ffeed959a3
Believed-to-be-working attaching of tags to write bursts in the AXI4 LLC
...
wrapper.
2020-05-28 18:21:03 +01:00
jon
8ae5d3a1b2
Build RVFI_DII Toooba with very small caches, 2-way set associative to
...
maximise cache and memory verification.
2020-05-28 10:59:08 +01:00
jon
8a07e18439
Do memory zeroing on reset when doing RVFI-DII.
...
I couldn't quite use the implementation from Flute as the register was
too wide for verilator.
This one uses wide memories instead, which is way complicated, but I
think it works. The width of the memory can be traded off for reset
speed. The width at the moment is 8192 bits, which seems to be fast
enough.
2020-05-28 10:55:46 +01:00
Peter Rugg
57129f6383
Some minor cleanup of decode
2020-05-21 15:51:03 +01:00
Peter Rugg
2702f40b5e
Initial implementation of CSetBoundsExact
2020-05-21 15:50:37 +01:00
Peter Rugg
791e862377
Initial (slow) implementation of CTestSubset
2020-05-21 15:49:25 +01:00
jon
0a84227f93
Implement DDC offset.
2020-05-20 18:03:14 +01:00
jon
d00ade6c9d
Fix new-write-folding-in function to copy original tags where there are
...
no byte-enables set.
2020-05-20 13:31:09 +01:00
Peter Rugg
072c188f92
Initial implementation of CCSeal
2020-05-19 23:05:18 +01:00
Peter Rugg
61b97e090d
Fix CFromPtr common case
2020-05-19 23:04:53 +01:00
Peter Rugg
372e4e4dfb
Bump BSV-RVFI-DII
2020-05-19 16:36:59 +01:00
Peter Rugg
e74220afc4
Implement CFromPtr
2020-05-19 02:37:53 +01:00
Peter Rugg
cd4d296a0c
Initial attempt to allow reads/writes to xtvec, xepc via xtcc, xepcc
2020-05-14 17:22:39 +01:00