320 lines
11 KiB
Plaintext
320 lines
11 KiB
Plaintext
// Copyright (c) 2013-2019 Bluespec, Inc. All Rights Reserved
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package SoC_Map;
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// ================================================================
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// This module defines the overall 'address map' of the SoC, showing
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// the addresses serviced by each slave IP, and which addresses are
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// memory vs. I/O.
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// ***** WARNING! WARNING! WARNING! *****
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// During system integration, this address map should be identical to
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// the system interconnect settings (e.g., routing of requests between
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// masters and slaves). This map is also needed by software so that
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// it knows how to address various IPs.
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// This module contains no state; it just has constants, and so can be
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// freely instantiated at multiple places in the SoC module hierarchy
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// at no hardware cost. It allows this map to be defined in one
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// place and shared across the SoC.
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// ================================================================
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// This version of SoC_Map is for the DARPA SSITH GFE
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// Our "Near_Mem_IO" corresponds to "CLINT" in Rocket
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// ================================================================
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// Exports
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export SoC_Map_Struct (..), soc_map_struct;
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export SoC_Map_IFC (..), mkSoC_Map;
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export N_External_Interrupt_Sources;
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export n_external_interrupt_sources;
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export irq_num_uart16550_0;
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// ================================================================
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// Bluespec library imports
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import Routable :: *; // For Range
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// ================================================================
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// Project imports
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import Fabric_Defs :: *; // Only for type Fabric_Addr
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// ================================================================
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// Top-level-struct version of the SoC Map for RISCY-OOO
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typedef struct {
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Bit #(64) near_mem_io_addr_base;
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Bit #(64) near_mem_io_addr_size;
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Bit #(64) boot_rom_addr_base;
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Bit #(64) boot_rom_addr_size;
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Bit #(64) main_mem_addr_base;
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Bit #(64) main_mem_addr_size;
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Bit #(64) pc_reset_value;
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} SoC_Map_Struct
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deriving (FShow);
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SoC_Map_Struct soc_map_struct =
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SoC_Map_Struct {
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near_mem_io_addr_base: 'h_1000_0000,
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near_mem_io_addr_size: 'h_0001_0000,
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boot_rom_addr_base: 'h_7000_0000,
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boot_rom_addr_size: 'h_0000_1000,
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main_mem_addr_base: 'h_C000_0000,
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main_mem_addr_size: 'h_C000_0000,
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pc_reset_value: 'h_7000_0000 // = boot_rom_addr_base
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};
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// ================================================================
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function Bool addr_function(Fabric_Addr base, Fabric_Addr size, Fabric_Addr addr);
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return (base <= addr) && (addr < (base + size));
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endfunction
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// ================================================================
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// Interface and module for the address map
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interface SoC_Map_IFC;
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(* always_ready *) method Range#(Wd_Addr) m_plic_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_near_mem_io_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_flash_mem_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_ethernet_0_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_dma_0_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_timer_0_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_uart16550_0_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_gpio_0_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_boot_rom_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_ddr4_0_uncached_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_ddr4_0_cached_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_mem0_controller_addr_range;
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(* always_ready *) method Range#(Wd_Addr) m_soc_config_addr_range;
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(* always_ready *)
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method Bool m_is_mem_addr (Fabric_Addr addr);
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(* always_ready *)
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method Bool m_is_IO_addr (Fabric_Addr addr, Bool imem_not_dmem);
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(* always_ready *)
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method Bool m_is_near_mem_IO_addr (Fabric_Addr addr);
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(* always_ready *) method Bit #(64) m_pc_reset_value;
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(* always_ready *) method Bit #(64) m_mtvec_reset_value;
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(* always_ready *) method Bit #(64) m_nmivec_reset_value;
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endinterface
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// ================================================================
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(* synthesize *)
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module mkSoC_Map (SoC_Map_IFC);
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// ----------------------------------------------------------------
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// PLIC
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let plic_addr_range = Range {
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base: 'h_0C00_0000,
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size: 'h_0040_0000 // 4M
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};
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// ----------------------------------------------------------------
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// Near_Mem_IO (CLINT)
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let near_mem_io_addr_range = Range {
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base: 'h_1000_0000,
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size: 'h_0001_0000 // 64K
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};
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// ----------------------------------------------------------------
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// Flash Mem
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let flash_mem_addr_range = Range {
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base: 'h_4000_0000,
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size: 'h_0800_0000 // 128M
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};
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// ----------------------------------------------------------------
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// Ethernet 0
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let ethernet_0_addr_range = Range {
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base: 'h_6210_0000,
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size: 'h_0004_0000 // 256K
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};
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// ----------------------------------------------------------------
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// DMA 0
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let dma_0_addr_range = Range {
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base: 'h_6220_0000,
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size: 'h_0001_0000 // 64K
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};
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// ----------------------------------------------------------------
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// Timer
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let timer_0_addr_range = Range {
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base: 'h_5000_0000,
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size: 'h_0001_0000 // 64K
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};
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// ----------------------------------------------------------------
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// UART 0
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let uart16550_0_addr_range = Range {
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base: 'h_6230_0000,
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size: 'h_0000_1000 // 4K
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};
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// ----------------------------------------------------------------
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// GPIO 0
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let gpio_0_addr_range = Range {
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base: 'h_6FFF_0000,
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size: 'h_0001_0000 // 64K
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};
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// ----------------------------------------------------------------
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// Boot ROM
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let boot_rom_addr_range = Range {
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base: 'h_7000_0000,
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size: 'h_0000_1000 // 4K
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};
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// ----------------------------------------------------------------
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// DDR memory 0 uncached
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let ddr4_0_uncached_addr_range = Range {
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base: 'h_8000_0000,
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size: 'h_4000_0000 // 1G
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};
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// ----------------------------------------------------------------
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// DDR memory 0 cached
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let ddr4_0_cached_addr_range = Range {
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base: 'h_C000_0000,
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size: 'h_C000_0000 // 3G
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};
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// ----------------------------------------------------------------
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// SoC Config addresses
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let soc_config_addr_range = Range {
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base: 'h_0000_1000,
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size: 'h_0000_1000 // 4K
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};
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// ----------------------------------------------------------------
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function fn_is_flash_regs_addr = addr_function('h6240_0000, 'h1000);
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function fn_is_uart1_addr = addr_function('h6230_0000, 'h1000);
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function fn_is_i2c_addr = addr_function('h6231_0000, 'h1000);
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function fn_is_spi_addr = addr_function('h6232_0000, 'h1000);
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function fn_is_uart2_addr = addr_function('h6236_0000, 'h1000);
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function fn_is_gpio1_addr = addr_function('h6233_0000, 'h1000);
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function fn_is_gpio2_addr = addr_function('h6237_0000, 'h1000);
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function fn_is_xdma_control = addr_function('h2000_0000, 'h1000_0000);
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function fn_is_xdma_ecam = addr_function('h3000_0000, 'h1000_0000);
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// ----------------------------------------------------------------
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// Memory address predicate
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// Identifies memory addresses in the Fabric.
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// (Caches needs this information to cache these addresses.)
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function Bool fn_is_mem_addr (Fabric_Addr addr);
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return ( inRange(ddr4_0_cached_addr_range, addr)
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);
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endfunction
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// ----------------------------------------------------------------
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// I/O address predicate
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// Identifies I/O addresses in the Fabric.
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// (Caches needs this information to avoid cacheing these addresses.)
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function Bool fn_is_IO_addr (Fabric_Addr addr, Bool imem_not_dmem);
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return ( inRange(boot_rom_addr_range, addr)
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|| inRange(ddr4_0_uncached_addr_range, addr)
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|| inRange(flash_mem_addr_range, addr)
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|| inRange(soc_config_addr_range, addr)
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|| ( (! imem_not_dmem)
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&& ( inRange(plic_addr_range, addr)
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|| inRange(near_mem_io_addr_range, addr)
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|| inRange(ethernet_0_addr_range, addr)
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|| inRange(dma_0_addr_range, addr)
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|| inRange(timer_0_addr_range, addr)
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|| inRange(uart16550_0_addr_range, addr)
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|| inRange(gpio_0_addr_range, addr)
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|| fn_is_flash_regs_addr (addr)
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|| fn_is_uart1_addr (addr)
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|| fn_is_i2c_addr (addr)
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|| fn_is_spi_addr (addr)
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|| fn_is_uart2_addr (addr)
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|| fn_is_gpio1_addr (addr)
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|| fn_is_gpio2_addr (addr)
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|| fn_is_xdma_control (addr)
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|| fn_is_xdma_ecam (addr)
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)
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)
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);
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endfunction
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// ----------------------------------------------------------------
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// PC, MTVEC and NMIVEC reset values
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Bit #(64) pc_reset_value = boot_rom_addr_range.base;
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Bit #(64) mtvec_reset_value = 'h1000; // TODO
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Bit #(64) nmivec_reset_value = ?; // TODO
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// ================================================================
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// INTERFACE
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method Range#(Wd_Addr) m_plic_addr_range = plic_addr_range;
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method Range#(Wd_Addr) m_near_mem_io_addr_range = near_mem_io_addr_range;
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method Range#(Wd_Addr) m_flash_mem_addr_range = flash_mem_addr_range;
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method Range#(Wd_Addr) m_ethernet_0_addr_range = ethernet_0_addr_range;
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method Range#(Wd_Addr) m_dma_0_addr_range = dma_0_addr_range;
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method Range#(Wd_Addr) m_timer_0_addr_range = timer_0_addr_range;
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method Range#(Wd_Addr) m_uart16550_0_addr_range = uart16550_0_addr_range;
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method Range#(Wd_Addr) m_gpio_0_addr_range = gpio_0_addr_range;
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method Range#(Wd_Addr) m_boot_rom_addr_range = boot_rom_addr_range;
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method Range#(Wd_Addr) m_ddr4_0_uncached_addr_range = ddr4_0_uncached_addr_range;
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method Range#(Wd_Addr) m_ddr4_0_cached_addr_range = ddr4_0_cached_addr_range;
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method Range#(Wd_Addr) m_mem0_controller_addr_range = ddr4_0_cached_addr_range;
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method Range#(Wd_Addr) m_soc_config_addr_range = soc_config_addr_range;
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method Bool m_is_mem_addr (Fabric_Addr addr) = fn_is_mem_addr (addr);
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method Bool m_is_IO_addr (Fabric_Addr addr, Bool imem_not_dmem) = fn_is_IO_addr (addr, imem_not_dmem);
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method Bool m_is_near_mem_IO_addr (Fabric_Addr addr) = inRange (near_mem_io_addr_range, addr);
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method Bit #(64) m_pc_reset_value = pc_reset_value;
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method Bit #(64) m_mtvec_reset_value = mtvec_reset_value;
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method Bit #(64) m_nmivec_reset_value = nmivec_reset_value;
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endmodule
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// ================================================================
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// Interrupt request numbers (== index in to vector of
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// interrupt-request lines in Core)
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typedef 16 N_External_Interrupt_Sources;
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Integer n_external_interrupt_sources = valueOf (N_External_Interrupt_Sources);
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Integer irq_num_uart16550_0 = 0;
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// ================================================================
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endpackage
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