jon 2c6ad40f93 Check the already decoded destination to decide to populate the register write data field in RVFI.

2020-04-02 17:10:52 +01:00

..

BSV_Additional_Libs

Change tabs to 8 spaces, this time being careful to do this only in BSV files.

2020-03-23 14:44:39 +00:00

CHERI

Do the MTCC->PCC->MEPCC shuffle on trap.

2020-03-27 15:55:02 +00:00

Core

Port AXI4 changes from Flute

2020-03-27 16:45:26 +00:00

CPU

Move the register file to CapReg format, and pipe CapPipe around the pipeline.

2020-03-31 15:44:23 +01:00

Debug_Module

Change tabs to 8 spaces, this time being careful to do this only in BSV files.

2020-03-23 14:44:39 +00:00

ISA

An initial implementation of mccsr.

2020-03-27 17:47:02 +00:00

PLIC

Port AXI4 changes from Flute

2020-03-27 16:45:26 +00:00

RISCY_OOO

Check the already decoded destination to decide to populate the register write data field in RVFI.

2020-04-02 17:10:52 +01:00