113f888d37
New method 'debug_external_interrupt_req' to support emulation of a debug module starts at P3_Core interface and is plumbed all the way in to the CSR register MIP as interrupt [14]. The corresponding MIE[14] is always 1, so it is never masked. Still todo: should not be masked by MSTATUS interrupt-enables either. Also expanded interrupt-detection logic, mcause etc. to extend up to interrupt 14. Builds in standalone mode, runs ISA tests. Builds in src_SSITH_P3, generating RTL.
84 lines
2.3 KiB
Verilog
84 lines
2.3 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
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//
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//
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//
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//
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// Ports:
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// Name I/O size props
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// getControlFlow O 130
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// getControlFlow_dInst I 72
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// getControlFlow_rVal1 I 64
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// getControlFlow_rVal2 I 64
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// getControlFlow_pc I 64
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// getControlFlow_ppc I 64
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//
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// Combinational paths from inputs to outputs:
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// (getControlFlow_dInst,
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// getControlFlow_rVal1,
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// getControlFlow_rVal2,
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// getControlFlow_pc,
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// getControlFlow_ppc) -> getControlFlow
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module module_getControlFlow(getControlFlow_dInst,
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getControlFlow_rVal1,
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getControlFlow_rVal2,
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getControlFlow_pc,
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getControlFlow_ppc,
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getControlFlow);
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// value method getControlFlow
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input [71 : 0] getControlFlow_dInst;
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input [63 : 0] getControlFlow_rVal1;
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input [63 : 0] getControlFlow_rVal2;
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input [63 : 0] getControlFlow_pc;
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input [63 : 0] getControlFlow_ppc;
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output [129 : 0] getControlFlow;
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// signals for module outputs
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wire [129 : 0] getControlFlow;
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// remaining internal signals
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wire [63 : 0] x__h50;
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wire [31 : 0] x__h114;
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wire aluBr___d9;
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// value method getControlFlow
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assign getControlFlow =
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{ getControlFlow_pc,
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x__h50,
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getControlFlow_dInst[66:64] == 3'd1 && aluBr___d9,
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x__h50 != getControlFlow_ppc } ;
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// remaining internal signals
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module_aluBr instance_aluBr_0(.aluBr_a(getControlFlow_rVal1),
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.aluBr_b(getControlFlow_rVal2),
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.aluBr_brFunc(getControlFlow_dInst[48:46]),
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.aluBr(aluBr___d9));
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module_brAddrCalc instance_brAddrCalc_1(.brAddrCalc_pc(getControlFlow_pc),
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.brAddrCalc_val(getControlFlow_rVal1),
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.brAddrCalc_iType(getControlFlow_dInst[71:67]),
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.brAddrCalc_imm({ {32{x__h114[31]}},
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x__h114 }),
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.brAddrCalc_taken(getControlFlow_dInst[66:64] ==
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3'd1 &&
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aluBr___d9),
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.brAddrCalc(x__h50));
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assign x__h114 = getControlFlow_dInst[31:0] ;
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endmodule // module_getControlFlow
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