Cheri-research/Toooba
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Toooba/src_Core/RISCY_OOO/procs/lib
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jon f638644b84 Remove tval from the reorder buffer and just use PC. 
It's currently unknown to me what the function of tval in the reorder
buffer was, which is a bit scary.
It seemed to have some additional calculation to do with instruction
alignment, but verification with compressed instructions still seems to
work.
2020-07-13 18:13:21 +01:00
..
Amo.bsv
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Bht.bsv
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BrPred.bsv
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Btb.bsv
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Bypass.bsv
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CacheUtils.bsv
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CapChecks.bsvi
Add sentries
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ConcatReg.bsv
Initial load of files
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CSRs.bsvi
Factor out Opcodes and CSRs into separate files
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Decode.bsv
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DirPredictor.bsv
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DTlb.bsv
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Ehr.bsv
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EpochManager.bsv
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Exec.bsv
Share paths and registers between CSR reads and Special capability
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Fifos.bsv
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FP_Utils.bsv
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Fpu.bsv
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FullAssocTlb.bsv
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GlobalBrHistReg.bsv
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GlobalSpecUpdate.bsv
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GSelectPred.bsv
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GSharePred.bsv
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HasSpecBits.bsv
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ITlb.bsv
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L1CoCache.bsv
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L1LLConnect.bsv
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L2SetAssocTlb.bsv
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L2Tlb.bsv
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LatencyTimer.bsv
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LLCache.bsv
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LLCDmaConnect.bsv
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LLCRqMshrSecureModel.bsv
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MemLoader.bsv
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MemLoaderIF.bsv
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MemoryTypes.bsv
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MMIOAddrs.bsv
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MMIOCore.bsv
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MMIOInst.bsv
Prevent instruction fetch to unexpected devices
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MsgFifo.bsv
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MulDiv.bsv
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Opcodes.bsvi
Support for permissions and bounds checks for memory operations, taking
2020-05-06 18:48:44 +01:00
Performance.bsv
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PhysRFile.bsv
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ProcTypes.bsv
Share paths and registers between CSR reads and Special capability
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Ras.bsv
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RenameDebugIF.bsv
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RenamingTable.bsv
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ReorderBuffer.bsv
Remove tval from the reorder buffer and just use PC.
2020-07-13 18:13:21 +01:00
ReservationStationEhr.bsv
Added verbosity guards around $displays to dial down log verbosity
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SafeCounter.bsv
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Scoreboard.bsv
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SetAssocTlb.bsv
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SpecFifo.bsv
Checkpoint FIFO scheduler work.
2020-07-08 12:39:13 +01:00
SpecPoisonFifo.bsv
Roll back changes to SpecPoisonFifo which were accidentally committed.
2020-07-09 15:19:39 +01:00
SpecTagManager.bsv
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SplitLSQ.bsv
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StoreBuffer.bsv
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TlbConnect.bsv
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TlbTypes.bsv
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TourPred.bsv
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TourPredSecure.bsv
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TranslationCache.bsv
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Types.bsv
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VerificationPacket.bsv
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