Cheri-research/Toooba
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9d68d877d900272404f98d5af197fbe896d1eab1
Toooba/src_Core/RISCY_OOO/procs/lib
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Jonathan Woodruff 9d68d877d9 Move to much simpler design. 
Just update the head in Decode, and write data from Execute.
A loop calling from the same place will at least find the correct
address.
Also, the bad fixup interaction is solved.
2022-03-09 12:32:01 +00:00
..
Amo.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
Bht.bsv
A timing optimisation for the direction predictor.
2022-01-18 11:05:09 +00:00
BrPred.bsv
A timing optimisation for the direction predictor.
2022-01-18 11:05:09 +00:00
Btb.bsv
Timing optimisation for Tournament Predictor.
2022-01-12 16:08:33 +00:00
Bypass.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
CacheUtils.bsv
Initial implementation CLoadTags
2021-04-08 17:08:15 +01:00
CapChecks.bsvi
Added ccopytype_bypass
2021-11-10 11:53:26 +00:00
ConcatReg.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
CSRs.bsvi
CSRs: Don't guard HPM CSRs with PERFORMANCE_MONITORING
2021-02-28 01:11:39 +00:00
Decode.bsv
removed unnecessary execute permissions for Decode.bsv, Exec.bsv, ProcTypes.bsv, ReorderBuffer.bsv, and AluExePipeline.bsv
2021-11-29 10:38:23 +00:00
DirPredictor.bsv
Feed head of RAS through to execute with training info to reset the head
2021-11-16 11:00:04 +00:00
DTlb.bsv
Don't translate invalid vaddrs in the DTLB.
2021-10-14 17:13:18 +00:00
Ehr.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
EpochManager.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
Exceptions.bsvi
Merge branch 'mem_perm_checks' into CHERI
2020-07-23 16:53:14 +01:00
Exec.bsv
removed unnecessary execute permissions for Decode.bsv, Exec.bsv, ProcTypes.bsv, ReorderBuffer.bsv, and AluExePipeline.bsv
2021-11-29 10:38:23 +00:00
Fifos.bsv
FIFO optimisation both for build time (and possibly condition
2020-08-13 17:33:46 +01:00
FP_Utils.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
Fpu.bsv
Move to (recently merged) non-pipelined Divide.
2022-01-13 11:14:20 +00:00
FullAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
GlobalBrHistReg.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
GlobalSpecUpdate.bsv
Simpelest strategy for making wrongSpec not conflict with loads of
2022-01-31 12:36:17 +00:00
GSelectPred.bsv
A timing optimisation for the direction predictor.
2022-01-18 11:05:09 +00:00
GSharePred.bsv
A timing optimisation for the direction predictor.
2022-01-18 11:05:09 +00:00
HasSpecBits.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
IndexedMultiset.bsv
Fix condition where Queue can remain "empty" when there were outstanding
2021-07-07 11:34:29 +01:00
Interrupts.bsvi
Replace enums-for-constants with structs wrapping a plain Bit#(n)
2020-07-15 03:16:24 +01:00
ITlb.bsv
Use an invalid virtual address when preventing prediction, and also
2021-10-08 11:00:11 +00:00
L1CoCache.bsv
"fix" non PERFORMANCE_MONITORING build
2021-09-29 18:09:06 +01:00
L1LLConnect.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
L2SetAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
L2Tlb.bsv
initial changes for HPM consistency
2021-09-02 14:50:17 +01:00
LatencyTimer.bsv
Improve scheduling for LatencyTimer to improve timing path discovered on
2022-01-07 09:52:43 +00:00
LLCache.bsv
"fix" non PERFORMANCE_MONITORING build
2021-09-29 18:09:06 +01:00
LLCDmaConnect.bsv
Update BlueStuff API and Bump BlueStuff and TagController
2020-12-01 14:22:12 +00:00
LLCRqMshrSecureModel.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
Map.bsv
mad Maps flush on reset
2021-07-06 15:19:37 +01:00
MemLoader.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
MemLoaderIF.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
MemoryTypes.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
MMIOAddrs.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
MMIOCore.bsv
Initial implementation CLoadTags
2021-04-08 17:08:15 +01:00
MMIOInst.bsv
2-byte aligned instruction memory to simplify compressed instruction
2020-07-24 12:38:37 +01:00
MsgFifo.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
MulDiv.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
Opcodes.bsvi
Replace enums-for-constants with structs wrapping a plain Bit#(n)
2020-07-15 03:16:24 +01:00
Performance.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
PhysRFile.bsv
Use mkRegOR in register file.
2022-01-25 20:42:16 +00:00
ProcTypes.bsv
Only push to RAS when the linking instruction is non-speculative.
2022-02-18 13:22:02 +00:00
Ras.bsv
Move to much simpler design.
2022-03-09 12:32:01 +00:00
RenameDebugIF.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
RenamingTable.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
ReorderBuffer.bsv
Merge branch 'CHERI' into jdw57_prediction
2022-02-16 10:10:00 +00:00
ReservationStationEhr.bsv
Added verbosity guards around $displays to dial down log verbosity
2019-04-01 20:35:52 -04:00
RVRoundModes.bsvi
Replace enums-for-constants with structs wrapping a plain Bit#(n)
2020-07-15 03:16:24 +01:00
SafeCounter.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
Scoreboard.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
SetAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SpecBuffer.bsv
Two modules (that build) that should be helpful in delaying the commit
2021-12-15 17:06:46 +00:00
SpecFifo.bsv
Merge branch 'CHERI' into jdw57_prediction
2022-02-16 10:10:00 +00:00
SpecPoisonFifo.bsv
Roll back changes to SpecPoisonFifo which were accidentally committed.
2020-07-09 15:19:39 +01:00
SpecTagManager.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SplitLSQ.bsv
Revert some unintended changes from the last commit.
2022-02-01 11:08:37 +00:00
StoreBuffer.bsv
Initial implementation CLoadTags
2021-04-08 17:08:15 +01:00
TlbConnect.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
TlbTypes.bsv
Use Matt's slightly cleaner version of the function.
2021-10-11 16:23:22 +00:00
TourPred.bsv
Merge branch 'CHERI' into jdw57_prediction
2022-02-16 10:10:00 +00:00
TourPredSecure.bsv
A timing optimisation for the direction predictor.
2022-01-18 11:05:09 +00:00
TranslationCache.bsv
Add CHERI+RVFI_DII grant codes and copyrights
2020-07-06 17:39:25 +01:00
Types.bsv
Initial implementation CLoadTags
2021-04-08 17:08:15 +01:00
VerificationPacket.bsv
Initial load of files
2019-03-26 14:49:40 -04:00