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bb3eddccf20fcad98d5404b4925132e62588b820
Toooba/src_Core/RISCY_OOO/procs/lib
History
jon bb3eddccf2 Implement cap_mode switch for legacy loads and stores, as the mechanism 
for decoding has changed and was not setting the new flag.
2020-06-02 19:00:28 +01:00
..
Amo.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
Bht.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
BrPred.bsv
Refactoring around SCRs
2020-05-07 16:19:26 +01:00
Btb.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
Bypass.bsv
Move the register file to CapReg format, and pipe CapPipe around the pipeline.
2020-03-31 15:44:23 +01:00
CacheUtils.bsv
Fix byte-enable merging tag logic in the cache (with help from
2020-05-12 12:25:45 +01:00
CapChecks.bsvi
Initial implementation of CSetBoundsExact
2020-05-21 15:50:37 +01:00
ConcatReg.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
CSRs.bsvi
Factor out Opcodes and CSRs into separate files
2020-04-21 20:36:56 +01:00
Decode.bsv
Implement cap_mode switch for legacy loads and stores, as the mechanism
2020-06-02 19:00:28 +01:00
DirPredictor.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
DTlb.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
Ehr.bsv
Pipe through memory results. This design passes 100 memory test sequences of TestRIG. Yay!
2019-12-13 10:53:02 +00:00
EpochManager.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
Exec.bsv
Fix TestSubset top check the wrong way around
2020-06-01 20:23:42 +01:00
Fifos.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
FP_Utils.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
Fpu.bsv
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
FullAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
GlobalBrHistReg.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
GlobalSpecUpdate.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
GSelectPred.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
GSharePred.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
HasSpecBits.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
ITlb.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
L1CoCache.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
L1LLConnect.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
L2SetAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
L2Tlb.bsv
Change tabs to 8 spaces, this time being careful to do this only in BSV files.
2020-03-23 14:44:39 +00:00
LatencyTimer.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
LLCache.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
LLCDmaConnect.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
LLCRqMshrSecureModel.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
MemLoader.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
MemLoaderIF.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
MemoryTypes.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
MMIOAddrs.bsv
Change tabs to 8 spaces, this time being careful to do this only in BSV files.
2020-03-23 14:44:39 +00:00
MMIOCore.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
MMIOInst.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
MsgFifo.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
MulDiv.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
Opcodes.bsvi
Support for permissions and bounds checks for memory operations, taking
2020-05-06 18:48:44 +01:00
Performance.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
PhysRFile.bsv
Make type of register file generic.
2020-03-30 15:20:28 +01:00
ProcTypes.bsv
Fix CFromPtr common case
2020-05-19 23:04:53 +01:00
Ras.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
RenameDebugIF.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
RenamingTable.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
ReorderBuffer.bsv
Merge branch 'pdr32-wip' into CHERI
2020-05-12 00:19:36 +01:00
ReservationStationEhr.bsv
Added verbosity guards around $displays to dial down log verbosity
2019-04-01 20:35:52 -04:00
SafeCounter.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
Scoreboard.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
SetAssocTlb.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SpecFifo.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SpecPoisonFifo.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SpecTagManager.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SplitLSQ.bsv
Rework exceptions in the memory pipeline to reconverge with the original
2020-05-07 19:35:00 +01:00
StoreBuffer.bsv
Try new types to hold capabilities
2020-04-30 14:07:37 +01:00
TlbConnect.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
TlbTypes.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
TourPred.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
TourPredSecure.bsv
Changes to make PCC consistent.
2020-04-27 15:13:36 +01:00
TranslationCache.bsv
Resolve some issues to build on mac.
2020-03-19 19:21:59 +00:00
Types.bsv
Fix new-write-folding-in function to copy original tags where there are
2020-05-20 13:31:09 +01:00
VerificationPacket.bsv
Initial load of files
2019-03-26 14:49:40 -04:00