Cheri-research/Toooba
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c0ae2776e803a98882f7de1d3fa1757f2d26163c
Toooba/src_Core
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rsnikhil c0ae2776e8 Further additions to Tandem Verification trace info. 
Rd value (destination register) of Integer ops supported
Trap updates (priv and CSR updates) supported.
Still pending: Memory ops Rd value, Fpu Rd value
2020-02-07 23:10:53 -05:00
..
BSV_Additional_Libs
Added support for 'debug_external_interrupt_req'
2019-04-01 12:26:54 -04:00
Core
Further additions to Tandem Verification trace info.
2020-02-07 23:10:53 -05:00
CPU
Further additions to Tandem Verification trace info.
2020-02-07 23:10:53 -05:00
Debug_Module
Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
2020-02-04 16:02:53 -05:00
ISA
Removed EXTERNAL_DEBUG_MODULE stuff from CoreW.bsv; added Tandem Verif control flow
2020-01-29 13:19:31 -05:00
PLIC
Initial load of files
2019-03-26 14:49:40 -04:00
RISCY_OOO
Further additions to Tandem Verification trace info.
2020-02-07 23:10:53 -05:00