Cheri-research/Toooba
1
0
Fork 0
Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
Files
c0ae2776e803a98882f7de1d3fa1757f2d26163c
Toooba/src_Core/Core
History
rsnikhil c0ae2776e8 Further additions to Tandem Verification trace info. 
Rd value (destination register) of Integer ops supported
Trap updates (priv and CSR updates) supported.
Still pending: Memory ops Rd value, Fpu Rd value
2020-02-07 23:10:53 -05:00
..
CoreW_IFC.bsv
Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
2020-02-04 16:02:53 -05:00
CoreW.bsv
Minor tweaks, mostly cosmetic and $displays
2020-02-06 14:18:16 -05:00
Fabric_Defs.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
Trace_Data2_to_Trace_Data.bsv
Further additions to Tandem Verification trace info.
2020-02-07 23:10:53 -05:00
Trace_Data2.bsv
Further additions to Tandem Verification trace info.
2020-02-07 23:10:53 -05:00
TV_Encode.bsv
Set verbosity to 0 in TV_Encode and Trace_Data2_to_Trace_Data
2020-01-30 13:39:54 -05:00
TV_Taps.bsv
Added support for 'debug_external_interrupt_req'
2019-04-01 12:26:54 -04:00