Cheri-research/Toooba
1
0
Fork 0
Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
Files
e3664c2bfd5752cce1143aa421bdfcfc8a974dc9
Toooba/src_SSITH_P3/Verilog_RTL_sim
History
rsnikhil c278e4fe68 Fixed a bug, and a related Tandem-Verification bug, re. CSR MIP MEIP/MTIP/MSIP. 
Two of these were not properly restricted as read-only from CSRRX instructions,
and there was a bug in the WARL function for writing MIP,
and there was a bug in the TV-reporting of MIP updates.
2020-03-12 21:44:00 -04:00
..
mkAluDispToRegFifo.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkAluExeToFinFifo.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkAluRegToExeFifo.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkBht.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkCore.v
Fixed a bug, and a related Tandem-Verification bug, re. CSR MIP MEIP/MTIP/MSIP.
2020-03-12 21:44:00 -04:00
mkCoreW.v
Fixed a bug, and a related Tandem-Verification bug, re. CSR MIP MEIP/MTIP/MSIP.
2020-03-12 21:44:00 -04:00
mkDCRqMshrWrapper.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDebug_Module.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDirPredictor.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDivExecQ.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_Abstract_Commands.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_CSR_Tap.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_GPR_Tap.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_Mem_Tap.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_Run_Control.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDM_System_Bus.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDoubleDiv.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDoubleFMA.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDoubleSqrt.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDPipeline.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDPRqMshrWrapper.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkDTlbSynth.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkDummyStoreBuffer.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkEpochManager.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkFabric_2x3.v
Fixed a Tandem Verification trace generation bug for FMV.X.F and FMV.X.D
2020-03-09 14:47:20 -04:00
mkFetchStage.v
Fixed a Tandem Verification trace generation bug for FMV.X.F and FMV.X.D
2020-03-09 14:47:20 -04:00
mkFmaExecQ.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkFpuMulDivDispToRegFifo.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
mkFpuMulDivRegToExeFifo.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
mkGSelectGHistReg.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkGSelectPred.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkGShareGHistReg.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkGSharePred.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkIBankWrapper.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkICoCache.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkICRqMshrWrapper.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkIPipeline.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkIPRqMshrWrapper.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkITlb.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkJtagTap.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkL2Tlb.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkLastLvCRqMshr.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkLLCache.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkLLPipeline.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkLSQIssueLdQ.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkMemDispToRegFifo.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkMemLoader.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkMemRegToExeFifo.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkMinimumExecQ.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
mkMMIOInst.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkMulExecQ.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkNullTransCache.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkP3_Core.v
Fixed a bug, and a related Tandem-Verification bug, re. CSR MIP MEIP/MTIP/MSIP.
2020-03-12 21:44:00 -04:00
mkPLIC_16_2_7.v
Fixes reported by Joe Stoy: PLIC, MMIO_AXI4_Adapter and Core.bsv (details below)
2020-03-08 15:39:57 -04:00
mkProc.v
Fixed a bug, and a related Tandem-Verification bug, re. CSR MIP MEIP/MTIP/MSIP.
2020-03-12 21:44:00 -04:00
mkRas.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkRegRenamingTable.v
Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization
2020-03-03 13:56:31 -05:00
mkReorderBufferSynth.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkReservationStationAlu.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkReservationStationFpuMulDiv.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkReservationStationMem.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkRFileSynth.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkRobRowSynth.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
mkScoreboardAggr.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkScoreboardCons.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkSimpleRespQ.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
mkSoC_Map.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkSpecTagManager.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkSplitLSQ.v
Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization
2020-03-03 13:56:31 -05:00
mkSplitTransCache.v
Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization
2020-03-03 13:56:31 -05:00
mkStoreBufferEhr.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkSyncBramFifo_w36_d512.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkSyncFifo_w32_d16.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkTourGHistReg.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkTourPred.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkTourPredSecure.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkTrace_Data2_to_Trace_Data.v
Improved avoidance of initial timer interrupt in MMIOPlatform; removed spurios MSTATUS TV report on CSRRS/C with rs1==0
2020-03-11 22:42:18 -04:00
mkTV_Encode.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
mkTV_Xactor.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpDiv.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpDivIP.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpDivSim.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpFma.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpFmaIP.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpFmaSim.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpSqrt.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpSqrtIP.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
mkXilinxFpSqrtSim.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_alu.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_aluBr.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_amoExec.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_basicExec.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_brAddrCalc.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_checkForException.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
module_decode.v
Modified synth and sim compile options in the Makefile
2020-02-22 17:51:13 +05:30
module_decodeBrPred.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00
module_execFpuSimple.v
Fixed Tandem-Verification trace generation issue re. MSTATUS on CSRRx instructions that write to FCSR.
2020-03-08 21:29:30 -04:00
module_getControlFlow.v
Bugfix: TV_Encode, after NDM_RESET, was not back to a neutral starting point.
2020-02-12 10:44:30 -05:00