Add missing ifdef.
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@@ -243,7 +243,9 @@ module mkFpuMulDivExePipeline#(FpuMulDivExeInput inIfc)(FpuMulDivExePipeline);
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end
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// update the instruction in the reorder buffer.
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inIfc.rob_setExecuted(tag, data, fflags, tagged Invalid, cast(inIfc.scaprf_rd(SCR_PCC))
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`ifdef RVFI_DII
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, ExtraTraceBundle{regWriteData: data, memByteEn: ?}
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`endif
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);
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// since FPU op has no spec tag, this doFinish rule is ordered before
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// other rules that calls incorrectSpec, and BSV compiler creates
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