Merge remote-tracking branch 'origin/CHERI' into jdw57_prediction

src_Core/RISCY_OOO/procs/lib/DTlb.bsv

@@ -287,10 +287,11 @@ module mkDTlb#(
         end
         else if(pRs.entry matches tagged Valid .en) begin
             // check permission
-            $display("dPRs: vm_info: ", fshow(vm_info),
-                     "      en     : ", fshow(en),
-                     "      r      : ", fshow(r)
-                     );
+            if (verbose)
+                $display("dPRs: vm_info: ", fshow(vm_info),
+                         "      en     : ", fshow(en),
+                         "      r      : ", fshow(r)
+                         );
             let permCheck = hasVMPermission(vm_info,
                                             en.pteType,
                                             en.pteUpperType,

src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv

@@ -46,7 +46,7 @@ import MemoryTypes::*;
 import CHERICap::*;
 import CHERICC_Fat::*;
 import ISA_Decls_CHERI::*;
-`ifdef RVFI_DII
+`ifdef RVFI
 import GetPut::*;
 import RVFI_DII_Types::*;
 `endif
@@ -86,8 +86,10 @@ typedef struct {
 `endif
 } InstTag deriving(Bits, Eq, FShow);
 
-`ifdef RVFI_DII
+`ifdef RVFI
 typedef Vector#(SupSize, Maybe#(RVFI_DII_Execution #(64, 64))) Rvfi_Traces;
+`endif
+`ifdef RVFI_DII
 typedef Vector#(TMul#(SupSize, 2), RVFI_DII_Parcel_Resp) Dii_Parcel_Resps;
 typedef Vector#(TMul#(SupSize, 2), Bit#(16)) Dii_Parcels;
 

src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv

@@ -756,7 +756,6 @@ module mkSupReorderBuffer#(
                 // move deqP & reset valid
                 deqP[i] <= getNextPtr(deqP[i]);
                 valid[i][deqP[i]][valid_deq_port] <= False;
-                $display("deq[%d][%d]", i, deqP[i]);
             end
         end
         // update firstDeqWay: find the first deq port that is not enabled