enabled performance counter in CSR register

2026-03-18 11:49:19 +00:00
parent a0b8d07155
commit 9606815dfa
6 changed files with 3910 additions and 1 deletions
--- a/src_Core/CPU/CsrFile.bsv
+++ b/src_Core/CPU/CsrFile.bsv
@@ -330,7 +330,7 @@ interface StatsCsr;
 endinterface

 module mkStatsCsr(StatsCsr);
-    Reg#(Bool) doStats <- mkConfigReg(False);
+    Reg#(Bool) doStats <- mkConfigReg(True);

    FIFO#(Bool) writeQ <- mkFIFO1;