enabled performance counter in CSR register

2026-03-18 11:49:19 +00:00
parent a0b8d07155
commit 9606815dfa
6 changed files with 3910 additions and 1 deletions
--- a/src_Core/RISCY_OOO/procs/lib/DTlb.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/DTlb.bsv
@@ -233,6 +233,14 @@ module mkDTlb#(
            L1TlbAllMissCycles: (allMissCycles);
            default: (0);
        endcase);
+        // Print the requested counter and its value
+        $display("[doPerf] Request Type: %0d, Value: %0d", t, d);
+
+        // (Optional) More detailed debug info
+        $display("  accessCnt=%0d, missParentCnt=%0d, missParentLat=%0d",
+             accessCnt, missParentCnt, missParentLat);
+        $display("  L1TlbmissPeerCnt=%0d, L1TlbmissPeerLat=%0d, L1TlbhitUnderMissCnt=%0d, L1TlballMissCycles=%0d",
+             missPeerCnt, missPeerLat, hitUnderMissCnt, allMissCycles);
        perfRespQ.enq(PerfResp {
            pType: t,
            data: d