Revert to upstream direction predictors to reduce diffs and prepare for
improvements that can be upstreamed. Basically, only use addresses in these predictors rather than capabilities, and just pass an address in from the FetchStage.
This commit is contained in:
@@ -700,7 +700,7 @@ module mkFetchStage(FetchStage);
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// direction predict
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Bool pred_taken = False;
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if(dInst.iType == Br) begin
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let pred_res <- dirPred.pred[i].pred(pc);
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let pred_res <- dirPred.pred[i].pred(getAddr(pc));
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pred_taken = pred_res.taken;
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dp_train = pred_res.train;
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end
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@@ -943,7 +943,7 @@ module mkFetchStage(FetchStage);
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//end
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if (iType == Br) begin
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// Train the direction predictor for all branches
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dirPred.update(pc, taken, dpTrain, mispred);
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dirPred.update(getAddr(pc), taken, dpTrain, mispred);
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end
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// train next addr pred when mispred
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if(mispred) begin
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@@ -39,8 +39,6 @@ import ProcTypes::*;
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import RegFile::*;
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import Vector::*;
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import BrPred::*;
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import CHERICC_Fat::*;
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import CHERICap::*;
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export BhtTrainInfo;
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export mkBht;
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@@ -57,14 +55,14 @@ module mkBht(DirPredictor#(BhtTrainInfo));
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// mkRegFileWCF is the RegFile version of mkConfigReg
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RegFile#(BhtIndex, Bit#(2)) hist <- mkRegFileWCF(0,fromInteger(valueOf(BhtEntries)-1));
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function BhtIndex getIndex(CapMem pc);
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return truncate(getAddr(pc) >> 2);
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function BhtIndex getIndex(Addr pc);
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return truncate(pc >> 2);
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endfunction
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Vector#(SupSize, DirPred#(BhtTrainInfo)) predIfc;
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for(Integer i = 0; i < valueof(SupSize); i = i+1) begin
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predIfc[i] = (interface DirPred;
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method ActionValue#(DirPredResult#(BhtTrainInfo)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(BhtTrainInfo)) pred(Addr pc);
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let index = getIndex(pc);
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Bit#(2) cnt = hist.sub(index);
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Bool taken = cnt[1] == 1;
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@@ -78,7 +76,7 @@ module mkBht(DirPredictor#(BhtTrainInfo));
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interface pred = predIfc;
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method Action update(CapMem pc, Bool taken, BhtTrainInfo train, Bool mispred);
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method Action update(Addr pc, Bool taken, BhtTrainInfo train, Bool mispred);
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let index = getIndex(pc);
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let current_hist = hist.sub(index);
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Bit#(2) next_hist;
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@@ -73,12 +73,12 @@ typedef struct {
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} DirPredResult#(type trainInfoT) deriving(Bits, Eq, FShow);
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interface DirPred#(type trainInfoT);
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method ActionValue#(DirPredResult#(trainInfoT)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(trainInfoT)) pred(Addr pc);
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endinterface
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interface DirPredictor#(type trainInfoT);
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interface Vector#(SupSize, DirPred#(trainInfoT)) pred;
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method Action update(CapMem pc, Bool taken, trainInfoT train, Bool mispred);
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method Action update(Addr pc, Bool taken, trainInfoT train, Bool mispred);
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method Action flush;
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method Bool flush_done;
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endinterface
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@@ -41,8 +41,6 @@ import Ehr::*;
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import Vector::*;
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import GlobalBrHistReg::*;
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import BrPred::*;
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import CHERICC_Fat::*;
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import CHERICap::*;
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export GSelectGHistSz;
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export GSelectGHist;
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@@ -85,8 +83,8 @@ module mkGSelectPred(DirPredictor#(GSelectTrainInfo));
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Ehr#(TAdd#(1, SupSize), Bit#(TLog#(TAdd#(SupSize, 1)))) predCnt <- mkEhr(0);
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Ehr#(TAdd#(1, SupSize), Bit#(SupSize)) predRes <- mkEhr(0);
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function BhtIndex getIndex(CapMem pc, GSelectGHist gHist);
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Bit#(PCIndexSz) pcIdx = truncate(getAddr(pc) >> 2);
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function BhtIndex getIndex(Addr pc, GSelectGHist gHist);
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Bit#(PCIndexSz) pcIdx = truncate(pc >> 2);
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return {gHist, pcIdx};
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endfunction
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@@ -108,7 +106,7 @@ module mkGSelectPred(DirPredictor#(GSelectTrainInfo));
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Vector#(SupSize, DirPred#(GSelectTrainInfo)) predIfc;
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for(Integer i = 0; i < valueof(SupSize); i = i+1) begin
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predIfc[i] = (interface DirPred;
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method ActionValue#(DirPredResult#(GSelectTrainInfo)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(GSelectTrainInfo)) pred(Addr pc);
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// get the global history
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// all previous branch in this cycle must be not taken
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// otherwise this branch should be on wrong path
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@@ -142,7 +140,7 @@ module mkGSelectPred(DirPredictor#(GSelectTrainInfo));
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interface pred = predIfc;
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method Action update(CapMem pc, Bool taken, GSelectTrainInfo train, Bool mispred);
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method Action update(Addr pc, Bool taken, GSelectTrainInfo train, Bool mispred);
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// update history if mispred
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if(mispred) begin
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GSelectGHist newHist = truncate({pack(taken), train.gHist} >> 1);
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@@ -41,8 +41,6 @@ import Ehr::*;
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import Vector::*;
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import GlobalBrHistReg::*;
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import BrPred::*;
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import CHERICC_Fat::*;
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import CHERICap::*;
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export GShareGHistSz;
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export GShareGHist;
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@@ -85,8 +83,8 @@ module mkGSharePred(DirPredictor#(GShareTrainInfo));
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Ehr#(TAdd#(1, SupSize), Bit#(TLog#(TAdd#(SupSize, 1)))) predCnt <- mkEhr(0);
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Ehr#(TAdd#(1, SupSize), Bit#(SupSize)) predRes <- mkEhr(0);
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function BhtIndex getIndex(CapMem pc, GShareGHist gHist);
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Bit#(PCIndexSz) pcIdx = truncate(getAddr(pc) >> 2);
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function BhtIndex getIndex(Addr pc, GShareGHist gHist);
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Bit#(PCIndexSz) pcIdx = truncate(pc >> 2);
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return gHist ^ pcIdx;
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endfunction
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@@ -108,7 +106,7 @@ module mkGSharePred(DirPredictor#(GShareTrainInfo));
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Vector#(SupSize, DirPred#(GShareTrainInfo)) predIfc;
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for(Integer i = 0; i < valueof(SupSize); i = i+1) begin
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predIfc[i] = (interface DirPred;
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method ActionValue#(DirPredResult#(GShareTrainInfo)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(GShareTrainInfo)) pred(Addr pc);
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// get the global history
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// all previous branch in this cycle must be not taken
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// otherwise this branch should be on wrong path
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@@ -142,7 +140,7 @@ module mkGSharePred(DirPredictor#(GShareTrainInfo));
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interface pred = predIfc;
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method Action update(CapMem pc, Bool taken, GShareTrainInfo train, Bool mispred);
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method Action update(Addr pc, Bool taken, GShareTrainInfo train, Bool mispred);
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// update history if mispred
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if(mispred) begin
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GShareGHist newHist = truncate({pack(taken), train.gHist} >> 1);
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@@ -41,8 +41,6 @@ import Ehr::*;
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import Vector::*;
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import GlobalBrHistReg::*;
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import BrPred::*;
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import CHERICC_Fat::*;
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import CHERICap::*;
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export TourLocalHistSz;
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export TourLocalHist;
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@@ -96,8 +94,8 @@ module mkTourPred(DirPredictor#(TourTrainInfo));
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Ehr#(TAdd#(1, SupSize), SupCnt) predCnt <- mkEhr(0);
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Ehr#(TAdd#(1, SupSize), Bit#(SupSize)) predRes <- mkEhr(0);
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function PCIndex getPCIndex(CapMem pc);
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return truncate(getAddr(pc) >> 2);
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function PCIndex getPCIndex(Addr pc);
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return truncate(pc >> 2);
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endfunction
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// common sat counter operations
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@@ -120,7 +118,7 @@ module mkTourPred(DirPredictor#(TourTrainInfo));
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Vector#(SupSize, DirPred#(TourTrainInfo)) predIfc;
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for(Integer i = 0; i < valueof(SupSize); i = i+1) begin
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predIfc[i] = (interface DirPred;
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method ActionValue#(DirPredResult#(TourTrainInfo)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(TourTrainInfo)) pred(Addr pc);
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// get local history & prediction
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TourLocalHist localHist = localHistTab.sub(getPCIndex(pc));
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Bool localTaken = isTaken(localBht.sub(localHist));
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@@ -166,7 +164,7 @@ module mkTourPred(DirPredictor#(TourTrainInfo));
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interface pred = predIfc;
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method Action update(CapMem pc, Bool taken, TourTrainInfo train, Bool mispred);
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method Action update(Addr pc, Bool taken, TourTrainInfo train, Bool mispred);
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// update history if mispred
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if(mispred) begin
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TourGlobalHist newHist = truncateLSB({pack(taken), train.globalHist});
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@@ -42,8 +42,6 @@ import Vector::*;
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import GlobalBrHistReg::*;
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import BrPred::*;
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import TourPred::*;
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import CHERICC_Fat::*;
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import CHERICap::*;
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export mkTourPredSecure;
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@@ -75,7 +73,7 @@ typedef TExp#(LgGlobalVecSz) GlobalVecSz;
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typedef Bit#(GlobalVecSz) GlobalVecSelect;
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typedef struct {
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CapMem pc;
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Addr pc;
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Bool taken;
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TourTrainInfo train;
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Bool mispred;
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@@ -105,8 +103,8 @@ module mkTourPredSecure(DirPredictor#(TourTrainInfo));
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Reg#(Bool) flushDone <- mkReg(True);
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Reg#(TabIndex) flushIndex <- mkReg(0);
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function Tuple2#(TabIndex, LocalHistVecSelect) getPCIndex(CapMem pc);
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PCIndex pcIdx = truncate(getAddr(pc) >> 2);
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function Tuple2#(TabIndex, LocalHistVecSelect) getPCIndex(Addr pc);
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PCIndex pcIdx = truncate(pc >> 2);
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TabIndex tabIdx = truncateLSB(pcIdx);
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LocalHistVecSelect sel = truncate(pcIdx);
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return tuple2(tabIdx, sel);
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@@ -144,7 +142,7 @@ module mkTourPredSecure(DirPredictor#(TourTrainInfo));
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Vector#(SupSize, DirPred#(TourTrainInfo)) predIfc;
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for(Integer i = 0; i < valueof(SupSize); i = i+1) begin
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predIfc[i] = (interface DirPred;
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method ActionValue#(DirPredResult#(TourTrainInfo)) pred(CapMem pc);
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method ActionValue#(DirPredResult#(TourTrainInfo)) pred(Addr pc);
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// get local history
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let {localHistTabIdx, localHistVecSel} = getPCIndex(pc);
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Vector#(LocalHistVecSz, TourLocalHist) localHistVec = localHistTab.sub(localHistTabIdx);
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@@ -255,7 +253,7 @@ module mkTourPredSecure(DirPredictor#(TourTrainInfo));
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interface pred = predIfc;
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method Action update(CapMem pc, Bool taken, TourTrainInfo train, Bool mispred);
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method Action update(Addr pc, Bool taken, TourTrainInfo train, Bool mispred);
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updateEn.wset(TourUpdate {pc: pc, taken: taken, train: train, mispred: mispred});
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endmethod
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