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Disable assert since normal instructions can read SCRs

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This commit is contained in:
Peter Rugg
2020-05-11 22:39:12 +01:00
parent 20eb1129b1
commit ec9f19dc26
1 changed files with 2 additions and 2 deletions
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4
src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv
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@@ -309,9 +309,9 @@ module mkAluExePipeline#(AluExeInput inIfc)(AluExePipeline);
end
// when inst needs to store scrData in ROB, it must have iType = Scr, cannot mispredict
if(isValid(x.dInst.scr)) begin
doAssert(x.dInst.iType == Scr, "Only Scr inst needs to update scrData in ROB");
// doAssert(x.dInst.iType == Scr, "Only Scr inst needs to update scrData in ROB"); // Removed because normal instructions can read SCRs
doAssert(!exec_result.controlFlow.mispredict, "Scr inst cannot mispredict");
doAssert(cast(exec_result.controlFlow.nextPc) == x.ppc && x.ppc == addPc(x.pc, 4), "Csr inst ppc = pc+4");
doAssert(cast(exec_result.controlFlow.nextPc) == x.ppc && x.ppc == addPc(x.pc, 4), "Scr inst ppc = pc+4");
end
// send bypass