Jonathan Woodruff
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ddf4afaf71
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Changes to build with a 512-bit main data bus (with all other busses
still 64-bits).
Also, the top-level SoC_Top exposes a 64-bit bus still, so hopefully the
GFE configuration is unchanged.
This passes the isa_tests.
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2022-11-11 17:52:32 +00:00 |
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Peter Rugg
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c406d357c9
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Add CHERI+RVFI_DII grant codes and copyrights
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2020-07-06 17:39:25 +01:00 |
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jon
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e403240818
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Undo gratuitous whitespace changes.
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2020-06-26 11:25:46 +01:00 |
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jon
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004d039bd8
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Reset the UART properly.
Also move to non-synth interface for UART.
Also annoying whistespace changes to normalise tabs.
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2020-06-25 18:04:27 +01:00 |
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Alexandre Joannou
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b5b2b4fe5c
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Port AXI4 changes from Flute
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2020-03-27 16:45:26 +00:00 |
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rsnikhil
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0ac138b08f
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UART_Model.bsv fixes for better support of 32b/64b fabrics and 4-byte/8-byte address strides
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2020-03-05 09:33:58 -05:00 |
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rsnikhil
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ee24a93944
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Initial load of files
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2019-03-26 14:49:40 -04:00 |
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