Commit Graph

26 Commits

Author SHA1 Message Date
Peter Rugg
8ba929438d Fix cloadtags in LLC 2022-03-31 02:07:01 +01:00
Peter Rugg
6d4644ce73 Add tag-only state to MESI and interface with tagOnlyReq of tag controller 2022-03-31 02:07:01 +01:00
Franz Fuchs
bc7eed67ab Did more cleaning up 2021-09-06 15:55:28 +01:00
Franz Fuchs
9f615e4481 initial changes for HPM consistency 2021-09-02 14:50:17 +01:00
Peter Rugg
dbb6043760 Don't compile SelfInv* without define 2021-08-16 14:42:59 +01:00
Peter Rugg
10f0807a9b Fix arbitration for non-power-of-two numbers of sources 2021-05-28 14:37:24 +01:00
Peter Rugg
bf911326e3 Fix some arbitration bugs 2021-05-28 12:36:06 +01:00
Jessica Clarke
46b1519cb0 mkXBar: Simplify as fallback case handles priority case correctly
The first element in the vector will be srcRR[dst], so the special case
is unnecessary.
2021-05-28 02:57:12 +01:00
Jessica Clarke
afd636a0f5 mkXBar: Fix bias towards earlier sources
In the case where the prioritised round-robin source does not have a
request, this was always picking the earliest source that had one, which
means if some sources are making more requests than others (e.g. there
is lots of D$ churn but the I$ has a high hit rate) then, whilst the
cycles where srcRR[dst] prioritises a source that is making requests are
fair, the cycles where it prioritises a source that is not making
requests is not fair, since then the earlier sources will be
prioritised. Instead, make the fallback priority similarly dynamic so we
cycle through the order we look at the sources in.
2021-05-28 02:32:04 +01:00
jon
86afb7e68e Add counter for LL writebacks (in the ST_MISS field). 2021-04-12 16:21:58 +01:00
Peter Rugg
fcea5365f6 Initial implementation CLoadTags
This currently just loads in the data on cache miss, so won't help to reduce DRAM overhead, but will be forwards compatible and save on instructions in the revoker loop.
2021-04-08 17:08:15 +01:00
jon
8da520175f Use an (unguarded) BRAM in the Btb.
Also, assume that a target that is not taken should be removed from the
Btb.  (The read that checked isn't possible with BRAM timing unless we
latched and had an extra port, but removing the check actually improved
performance a bit in CoreMark, and the pipeline should actually only be
reporting a non-taken branch if we did something wrong.)
2021-03-06 07:19:50 +00:00
jon
fa9931b64c Implement a couple Cache counters in the LLCache.
These aren't too useful... We don't seem to have normal counters for
loads and stores in the baseline.
2020-12-15 18:16:21 +00:00
jon
17a7a32092 Use DRegOR instead of immitating latching behaviour. 2020-12-15 16:18:36 +00:00
jon
b6a397df52 Support for ICache stat counters. 2020-12-15 14:49:16 +00:00
jon
73d25bf8f5 Support performance counters (hopefully) in the caches. The DCache
should be fully wired up.
2020-12-14 18:10:06 +00:00
jon
1f968b0c07 2-byte aligned instruction memory to simplify compressed instruction
fetch.
2020-07-24 12:38:37 +01:00
Peter Rugg
c406d357c9 Add CHERI+RVFI_DII grant codes and copyrights 2020-07-06 17:39:25 +01:00
jon
854151978e Fix byte-enable merging tag logic in the cache (with help from
Alexandre).
Also adjust priority in CCall exceptions.
2020-05-12 12:25:45 +01:00
Alexandre Joannou
b70498e00a Try new types to hold capabilities 2020-04-30 14:07:37 +01:00
Jonathan Woodruff
2aa902f61a Change tabs to 8 spaces, this time being careful to do this only in BSV files. 2020-03-23 14:44:39 +00:00
Jonathan Woodruff
a6e5a7bff0 Revert "Fix whitespace in src_Core directory."
This reverts commit a137a6ede7.
2020-03-23 14:40:02 +00:00
Jonathan Woodruff
a137a6ede7 Fix whitespace in src_Core directory.
Replace all tabs with 8 spaces.
2020-03-23 14:28:00 +00:00
Jonathan Woodruff
b830f4bf41 Resolve some issues to build on mac.
This includes renaming Fifo.bsv to Fifos.bsv to account for a case insensitive file system which confuses this library with FIFO.bsv.
Also this includes an update of the verilator flags that are needed for modern verilator.
Finally, some verilator flag changes for building with LLVM.
2020-03-19 19:21:59 +00:00
rsnikhil
9f94c9176e Added verbosity guards around $displays to dial down log verbosity
To get the instruction trace back, set verbosity to 1 in CommitStage.bsv.
Regressions: RV64ADFIMSU_Tooba_verilator: 199/227 PASS (1 test hangs)
2019-04-01 20:35:52 -04:00
rsnikhil
ee24a93944 Initial load of files 2019-03-26 14:49:40 -04:00