jon
44199a841b
Only check the bounds of nextPc if the branch is taken...
2020-04-29 18:34:02 +01:00
jon
1439fe98c7
Fix 2 bugs.
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Restore from sepc on sret.
To "inclusive" bounds check on Jumps and Branches.
2020-04-29 13:42:23 +01:00
jon
d3e0908785
Check PCC bounds in rename.
2020-04-28 19:08:07 +01:00
jon
ab6b8966db
Bounds-check legacy jalr and br correctly.
2020-04-28 11:47:09 +01:00
jon
5693af05e5
Changes to make PCC consistent.
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Specifically, attach the bounds to PC all the way back into the branch predictors.
2020-04-27 15:13:36 +01:00
jon
2251457840
Implement target bounds-check for CJALR.
2020-04-23 17:54:18 +01:00
Peter Rugg
3b30d2db36
Add BuildCap unsealing
2020-04-22 15:52:23 +01:00
Peter Rugg
8cc8f71cb9
Perform bounds check on requested length rather than rounded length.
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This prevents issues with overflow in the top, and should be correct
based on the rounding used in the SetBounds function.
2020-04-22 14:27:11 +01:00
Peter Rugg
a89a606a6d
Factor out Opcodes and CSRs into separate files
2020-04-21 20:36:56 +01:00
Peter Rugg
3693326b62
Don't sign extend CSetBoundsImm immediate
2020-04-21 16:45:04 +01:00
Peter Rugg
8a4fa786dd
Add CToPtr special case
2020-04-21 13:52:33 +01:00
Peter Rugg
1773530c72
Attempt to enable AUIPCC
2020-04-20 23:11:58 +01:00
Peter Rugg
923d4915cb
Make SetBounds legal
2020-04-20 23:05:26 +01:00
Peter Rugg
8e01cf68df
More concise FShow for CapChecks
2020-04-20 21:28:09 +01:00
Peter Rugg
b4be80eba1
Bounds Check fixes
2020-04-20 21:23:42 +01:00
Peter Rugg
7db3fa539f
Add ALU bounds check
2020-04-20 11:21:51 +01:00
Peter Rugg
1bb53e5e86
Merge branch 'CHERI' into pdr32-wip
2020-04-16 20:58:37 +01:00
Peter Rugg
f1e04486b7
Work on SCR-related instructions
2020-04-16 20:53:08 +01:00
Peter Rugg
8269a0625e
Initial implementation of set bounds
2020-04-16 20:39:54 +01:00
jon
4b2c3b1114
An attempt at doing the "right thing" with Jr targets and links with respect to PCC.
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This is not easy to test until we have CSetBounds.
2020-04-16 18:07:39 +01:00
jon
a77ecc59af
Checkpoint work to propagate register numbers into the exception code.
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There's another half of this left to do to propagate all the way into the CSR file.
2020-04-16 17:28:28 +01:00
jon
9bb3e835ac
Fix operand of CCall.
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Also fix one case of CCopyType where it is meant to return nullWithAddr(-1).
2020-04-16 11:38:38 +01:00
Peter Rugg
a0fb527ad7
Raise illegalInstruction for currently unsupported exceptions
2020-04-15 14:07:36 +01:00
Peter Rugg
e773cb0232
Add CIncOffsetImm
2020-04-15 14:06:46 +01:00
jon
9685bf1931
Implement CCall, hopefully as well as CJALR.
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This passes the unmodified TestRIG routine for CHERI Control Flow, which is very promising indeed!
There are some cases that are not covered there, but a lot is covered.
2020-04-14 18:10:53 +01:00
Peter Rugg
72dc8f8bad
Fix cap instructions not being sent to ALU
2020-04-07 19:55:09 +01:00
jon
56885f06c0
Changes for CJALR-only TestRIG to work.
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This includes replacing register read values with nullCap if reading x0, which is generally necessary.
This is more-or-less using a new mechanism which shouldn't actually be necessary if the default value in the register file is nullCap.
(In RVFI_DII, we initialise with the almightyCap instead.)
2020-04-07 16:32:31 +01:00
jon
850e632140
Changes for CJALR to work in a basic case, as well as piping CHERI exceptions through to commit, though the register isn't piped and I've undone some useful work for that piping. Oh well.
2020-04-06 18:18:05 +01:00
Peter Rugg
4ce8f54903
Add initial exception checks
2020-04-06 12:26:19 +01:00
jon
1ecdf73dd3
Make CJALR work like JALR but without an immediate. Seems to work!
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Obviously doesn't throw capability exceptions yet...
2020-04-03 17:57:57 +01:00
jon
d07d6f4761
Add OpCHERI to the function that rationalises opcodes.
2020-04-03 16:42:14 +01:00
Peter Rugg
f20c644bae
Add startings of decoding
2020-04-02 21:08:59 +01:00
jon
b656f46859
Both enable tracing of floating-point register writes in RVFI-DII, and then properly not use them (since we're not expected to).
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This is better than using nonsense as we were previously doing on floating point instructions.
2020-04-02 16:28:18 +01:00
Jonathan Woodruff
81da99237e
Move the register file to CapReg format, and pipe CapPipe around the pipeline.
2020-03-31 15:44:23 +01:00
Jonathan Woodruff
480b5923da
Make type of register file generic.
2020-03-30 15:20:28 +01:00
Jonathan Woodruff
db41e2b9ed
An initial implementation of mccsr.
2020-03-27 17:47:02 +00:00
Alexandre Joannou
b5b2b4fe5c
Port AXI4 changes from Flute
2020-03-27 16:45:26 +00:00
Jonathan Woodruff
c035f359e8
Merge branch 'CHERI' into pdr32-tmp
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and get it to build!
2020-03-26 18:03:58 +00:00
Peter Rugg
5f33b1c87a
Very initial decode and ALU work for CHERI
2020-03-26 14:35:02 +00:00
Jonathan Woodruff
d5b73a2d50
Add DDC exception.
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Also enable working exception reporting for the memory pipe.
2020-03-26 14:29:06 +00:00
Jonathan Woodruff
f2f2285f75
Check the bounds on PCC and report the correct exception in Xcause registers.
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This required makeing the Exception type wider by one.
The actual "inBounds" check is currently implemented in the reorder buffer rows, which duplicates the logic ~80 times (number of outstanding instructions), which isn't ideal, but it's using the quick in-bounds check that only compares the mantissa-sized things.
2020-03-25 15:20:03 +00:00
Jonathan Woodruff
88ca03f4ed
Pipe through an exception to the Reorder buffer from each execute pipe.
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Also move to SetAddrUnsafe, as is traditional for setting the address of PCC where we do proper checks on branches so we really only have the possibility of executing off the end of the length, and therefore cannot become unrepresentable.
2020-03-25 11:51:33 +00:00
Jonathan Woodruff
c813abe9c9
Write pcc bounds into reorderbuffer pc in the all execute pipeline stages.
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This allows pcc bounds to be consistent in the model of CSRs (written in commit and read in execute) in preparation for fancier forwarding eventually.
2020-03-25 09:10:38 +00:00
Jonathan Woodruff
22938d2384
Propagate a CapPipe through the PC of each instruction record.
2020-03-23 17:24:05 +00:00
Jonathan Woodruff
2aa902f61a
Change tabs to 8 spaces, this time being careful to do this only in BSV files.
2020-03-23 14:44:39 +00:00
Jonathan Woodruff
a6e5a7bff0
Revert "Fix whitespace in src_Core directory."
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This reverts commit a137a6ede7 .
2020-03-23 14:40:02 +00:00
Jonathan Woodruff
a137a6ede7
Fix whitespace in src_Core directory.
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Replace all tabs with 8 spaces.
2020-03-23 14:28:00 +00:00
Jonathan Woodruff
43fa43e2c9
Implement writes to PCC and preparation for checking the bounds of PCC.
2020-03-23 14:24:44 +00:00
Jonathan Woodruff
d77c158b76
Merge branch 'mac_build' into RVFI_DII
2020-03-20 11:35:11 +00:00
Jonathan Woodruff
b830f4bf41
Resolve some issues to build on mac.
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This includes renaming Fifo.bsv to Fifos.bsv to account for a case insensitive file system which confuses this library with FIFO.bsv.
Also this includes an update of the verilator flags that are needed for modern verilator.
Finally, some verilator flag changes for building with LLVM.
2020-03-19 19:21:59 +00:00