Commit Graph

13 Commits

Author SHA1 Message Date
jon
8492136abd Attempt to convert more functions in the MMIO platform to respect the
alignment of the original data.
Also eliminate the call to the reimplementation of the AMO functions.
(One call was already converted to use the common function, and I've now
converted the other.)
It's honestly unknown how much of this works, but it's more likely to
work than what was previously implemented, I think, given that the
previou implementation was based on some basic misconceptions concerning
data alignment.
2020-06-09 17:39:36 +01:00
jon
122e98b0c7 Attempt to provide correct alignment for MMIO requests in flits returned
to bus.
This does not yet attempt to fix writes which might likely also need
fixing.
2020-06-08 19:03:12 +01:00
Alexandre Joannou
b70498e00a Try new types to hold capabilities 2020-04-30 14:07:37 +01:00
Jonathan Woodruff
2aa902f61a Change tabs to 8 spaces, this time being careful to do this only in BSV files. 2020-03-23 14:44:39 +00:00
Jonathan Woodruff
a6e5a7bff0 Revert "Fix whitespace in src_Core directory."
This reverts commit a137a6ede7.
2020-03-23 14:40:02 +00:00
Jonathan Woodruff
a137a6ede7 Fix whitespace in src_Core directory.
Replace all tabs with 8 spaces.
2020-03-23 14:28:00 +00:00
Jonathan Woodruff
b830f4bf41 Resolve some issues to build on mac.
This includes renaming Fifo.bsv to Fifos.bsv to account for a case insensitive file system which confuses this library with FIFO.bsv.
Also this includes an update of the verilator flags that are needed for modern verilator.
Finally, some verilator flag changes for building with LLVM.
2020-03-19 19:21:59 +00:00
rsnikhil
f02e9af515 Improved avoidance of initial timer interrupt in MMIOPlatform; removed spurios MSTATUS TV report on CSRRS/C with rs1==0 2020-03-11 22:42:18 -04:00
rsnikhil
a19eb97f34 Small tweak to MMIOPlatform.bsv to avoid spurious timer interrupt at start of time. 2020-03-09 22:58:04 -04:00
rsnikhil
83829590dd Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
Now able to run multiple ISA tests in a single simulation run
connected to remote debugger DSharp, using either hart_reset or
ndm_reset between tests to bring the system back into reset state.
All Debug Module commands working:
 - dm_reset, hart_reset, ndm_reset
 - break    (set breakpoint)
 - step
 - continue (until breakpoint of 'halt' command)
 - halt
 - read/write GPR, FPR, CSR, memory
 - elf_load
2020-02-04 16:02:53 -05:00
rsnikhil
e7fbf32b38 Bugfix in MMIOPlatform.bsv for instruction-fetch from IO addrs
Detail: an "instruction-fetch" response from mmioplatform to core
should be an "InstFetch". This was true for successful fabric reads,
but on error responses it was wrongly returned as a "DataAccess"
response.  This was causing a deadlock.
2019-04-17 15:29:10 -04:00
rsnikhil
9f94c9176e Added verbosity guards around $displays to dial down log verbosity
To get the instruction trace back, set verbosity to 1 in CommitStage.bsv.
Regressions: RV64ADFIMSU_Tooba_verilator: 199/227 PASS (1 test hangs)
2019-04-01 20:35:52 -04:00
rsnikhil
ee24a93944 Initial load of files 2019-03-26 14:49:40 -04:00