2 Commits

Author SHA1 Message Date
800b2d4793 ignored test.txt 2026-02-05 18:55:19 +00:00
656cb4d5e8 saving traces for baremode 2026-02-05 18:53:37 +00:00
13 changed files with 14 additions and 3377 deletions

1
.gitignore vendored
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@@ -23,3 +23,4 @@ src_SSITH_P3/Verilog_RTL_sim
**/TagTableStructure.bsv
**/GenerateHPMVector.bsv
**/StatCounters.bsv
test.txt

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@@ -1,29 +0,0 @@
# Makefile to create an elf_to_hex executable.
# The executable creates mem-hex files containing 32-Byte words
CC = gcc
# the LIBERARY path needs to be set for Apple devices, e.g.,
# LIBRARY_PATH="$LIBRARY_PATH:$(brew --prefix)/lib"
uname_S := $(shell uname -s)
CFLAGS = -g -o elf_to_hex elf_to_hex.c -lelf
ifeq ($(uname_S), Darwin)
CC = clang++
APPLE_FLAGS = -L /opt/homebrew/lib -I /opt/homebrew/include/libelf -I /opt/homebrew/include
endif
elf_to_hex: elf_to_hex.c
$(CC) $(CFLAGS) $(APPLE_FLAGS)
# ================================================================
.PHONY: clean
clean:
rm -f *~
.PHONY: full_clean
full_clean:
rm -f *~ elf_to_hex

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@@ -1,12 +0,0 @@
Copyright (c) 2018 Bluespec, Inc. All Rights Reserved
This standalone C program takes two command-line arguments, and ELF
filename and a Mem Hex filename. It reads the ELF file and writes out
the Mem Hex file.
It assumes a memory that is:
- 16 MiB or 256 MiB (see C file)
- Each word is 32 bytes (256 bits)
- It starts at byte address 0x_8000_0000
All of these can be changed by editing the C file.

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@@ -1,382 +0,0 @@
// Copyright (c) 2013-2018 Bluespec, Inc. All Rights Reserved
// This program reads an ELF file and outputs a Verilog hex memory
// image file (suitable for reading using $readmemh).
// Modifications for CHERI as well as compiling on APPLE devices:
/*-
* Copyright (c) 2022 Jonathan Woodruff
* Copyright (c) 2022 Franz Fuchs
* All rights reserved.
*
* This software was developed by the University of Cambridge
* Department of Computer Science and Technology under the
* SIPP (Secure IoT Processor Platform with Remote Attestation)
* project funded by EPSRC: EP/S030868/1
*
* @BERI_LICENSE_HEADER_START@
*
* Licensed to BERI Open Systems C.I.C. (BERI) under one or more contributor
* license agreements. See the NOTICE file distributed with this work for
* additional information regarding copyright ownership. BERI licenses this
* file to you under the BERI Hardware-Software License, Version 1.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
*
* http://www.beri-open-systems.org/legal/license-1-0.txt
*
* Unless required by applicable law or agreed to in writing, Work distributed
* under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
* CONDITIONS OF ANY KIND, either express or implied. See the License for the
* specific language governing permissions and limitations under the License.
*
* @BERI_LICENSE_HEADER_END@
*/
// ================================================================
// Standard C includes
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#include <string.h>
#include <fcntl.h>
#include <gelf.h>
#ifdef __APPLE__
#include <vector>
#endif
// ================================================================
// Memory buffer into which we load the ELF file before
// writing it back out to the output file.
// 1 Gigabyte size
// #define MAX_MEM_SIZE (((uint64_t) 0x400) * ((uint64_t) 0x400) * ((uint64_t) 0x400))
#define MAX_MEM_SIZE ((uint64_t) 0x90000000)
#define BASE_ADDR_B 0x80000000lu
// For 16 MB memory at 0x_8000_0000
#define MIN_MEM_ADDR_16MB BASE_ADDR_B
#define MAX_MEM_ADDR_16MB (BASE_ADDR_B + 0x1000000lu)
// For 1 GB memory at 0x_8000_0000
#define MIN_MEM_ADDR_1GB BASE_ADDR_B
#define MAX_MEM_ADDR_1GB (BASE_ADDR_B + 0x40000000lu)
uint8_t *mem_buf;
// Features of the ELF binary
int bitwidth;
uint64_t min_addr;
uint64_t max_addr;
uint64_t pc_start; // Addr of label '_start'
uint64_t pc_exit; // Addr of label 'exit'
uint64_t tohost_addr; // Addr of label 'tohost'
// ================================================================
// Load an ELF file.
void c_mem_load_elf (char *elf_filename,
const char *start_symbol,
const char *exit_symbol,
const char *tohost_symbol)
{
int fd;
// int n_initialized = 0;
Elf *e;
// Default start, exit and tohost symbols
if (start_symbol == NULL)
start_symbol = "_start";
if (exit_symbol == NULL)
exit_symbol = "exit";
if (tohost_symbol == NULL)
tohost_symbol = "tohost";
// Verify the elf library version
if (elf_version (EV_CURRENT) == EV_NONE) {
fprintf (stderr, "ERROR: c_mem_load_elf: Failed to initialize the libelfg library!\n");
exit (1);
}
// Open the file for reading
fd = open (elf_filename, O_RDONLY, 0);
if (fd < 0) {
fprintf (stderr, "ERROR: c_mem_load_elf: could not open elf input file: %s\n", elf_filename);
exit (1);
}
// Initialize the Elf pointer with the open file
e = elf_begin (fd, ELF_C_READ, NULL);
if (e == NULL) {
fprintf (stderr, "ERROR: c_mem_load_elf: elf_begin() initialization failed!\n");
exit (1);
}
// Verify that the file is an ELF file
if (elf_kind (e) != ELF_K_ELF) {
elf_end (e);
fprintf (stderr, "ERROR: c_mem_load_elf: specified file '%s' is not an ELF file!\n", elf_filename);
exit (1);
}
// Get the ELF header
GElf_Ehdr ehdr;
if (gelf_getehdr (e, & ehdr) == NULL) {
elf_end (e);
fprintf (stderr, "ERROR: c_mem_load_elf: get_getehdr() failed: %s\n", elf_errmsg(-1));
exit (1);
}
// Is this a 32b or 64 ELF?
if (gelf_getclass (e) == ELFCLASS32) {
fprintf (stdout, "c_mem_load_elf: %s is a 32-bit ELF file\n", elf_filename);
bitwidth = 32;
}
else if (gelf_getclass (e) == ELFCLASS64) {
fprintf (stdout, "c_mem_load_elf: %s is a 64-bit ELF file\n", elf_filename);
bitwidth = 64;
}
else {
fprintf (stderr, "ERROR: c_mem_load_elf: ELF file '%s' is not 32b or 64b\n", elf_filename);
elf_end (e);
exit (1);
}
// Verify we are dealing with a RISC-V ELF
if (ehdr.e_machine != 243) { // EM_RISCV is not defined, but this returns 243 when used with a valid elf file.
elf_end (e);
fprintf (stderr, "ERROR: c_mem_load_elf: %s is not a RISC-V ELF file\n", elf_filename);
exit (1);
}
// Verify we are dealing with a little endian ELF
if (ehdr.e_ident[EI_DATA] != ELFDATA2LSB) {
elf_end (e);
fprintf (stderr,
"ERROR: c_mem_load_elf: %s is a big-endian 64-bit RISC-V executable which is not supported\n",
elf_filename);
exit (1);
}
// Grab the string section index
size_t shstrndx;
shstrndx = ehdr.e_shstrndx;
// Iterate through each of the sections looking for code that should be loaded
Elf_Scn *scn = 0;
GElf_Shdr shdr;
min_addr = 0xFFFFFFFFFFFFFFFFllu;
max_addr = 0x0000000000000000llu;
pc_start = 0xFFFFFFFFFFFFFFFFllu;
pc_exit = 0xFFFFFFFFFFFFFFFFllu;
tohost_addr = 0xFFFFFFFFFFFFFFFFllu;
while ((scn = elf_nextscn (e,scn)) != NULL) {
// get the header information for this section
gelf_getshdr (scn, & shdr);
char *sec_name = elf_strptr (e, shstrndx, shdr.sh_name);
fprintf (stdout, "Section %-16s: ", sec_name);
Elf_Data *data = 0;
// If we find a code/data section, load it into the model
if ( ((shdr.sh_type == SHT_PROGBITS)
|| (shdr.sh_type == SHT_NOBITS)
|| (shdr.sh_type == SHT_INIT_ARRAY)
|| (shdr.sh_type == SHT_FINI_ARRAY))
&& ((shdr.sh_flags & SHF_WRITE)
|| (shdr.sh_flags & SHF_ALLOC)
|| (shdr.sh_flags & SHF_EXECINSTR))) {
data = elf_getdata (scn, data);
// n_initialized += data->d_size;
if (shdr.sh_addr < min_addr)
min_addr = shdr.sh_addr;
if (max_addr < (shdr.sh_addr + data->d_size - 1)) // shdr.sh_size + 4))
max_addr = shdr.sh_addr + data->d_size - 1; // shdr.sh_size + 4;
if (max_addr >= MAX_MEM_SIZE) {
fprintf (stdout, "INTERNAL ERROR: max_addr (0x%0" PRIx64 ") > buffer size (0x%0" PRIx64 ")\n",
max_addr, MAX_MEM_SIZE);
fprintf (stdout, " Please increase the #define in this program, recompile, and run again\n");
fprintf (stdout, " Abandoning this run\n");
exit (1);
}
if (shdr.sh_type != SHT_NOBITS && shdr.sh_addr!=0) {
memcpy (& (mem_buf [shdr.sh_addr-MIN_MEM_ADDR_1GB]), data->d_buf, data->d_size);
}
fprintf (stdout, "addr %16" PRIx64 " to addr %16" PRIx64 "; size 0x%8lx (= %0ld) bytes\n",
shdr.sh_addr, shdr.sh_addr + data->d_size, data->d_size, data->d_size);
}
// If we find the symbol table, search for symbols of interest
else if (shdr.sh_type == SHT_SYMTAB) {
fprintf (stdout, "Searching for addresses of '%s', '%s' and '%s' symbols\n",
start_symbol, exit_symbol, tohost_symbol);
// Get the section data
data = elf_getdata (scn, data);
// Get the number of symbols in this section
int symbols = shdr.sh_size / shdr.sh_entsize;
// search for the uart_default symbols we need to potentially modify.
GElf_Sym sym;
int i;
for (i = 0; i < symbols; ++i) {
// get the symbol data
gelf_getsym (data, i, &sym);
// get the name of the symbol
char *name = elf_strptr (e, shdr.sh_link, sym.st_name);
// Look for, and remember PC of the start symbol
if (strcmp (name, start_symbol) == 0) {
pc_start = sym.st_value;
}
// Look for, and remember PC of the exit symbol
else if (strcmp (name, exit_symbol) == 0) {
pc_exit = sym.st_value;
}
// Look for, and remember addr of 'tohost' symbol
else if (strcmp (name, tohost_symbol) == 0) {
tohost_addr = sym.st_value;
}
}
FILE *fp_symbol_table = fopen ("symbol_table.txt", "w");
if (fp_symbol_table != NULL) {
fprintf (stdout, "Writing symbols to: symbol_table.txt\n");
if (pc_start == -1)
fprintf (stdout, " No '_start' label found\n");
else
fprintf (fp_symbol_table, "_start 0x%0" PRIx64 "\n", pc_start);
if (pc_exit == -1)
fprintf (stdout, " No 'exit' label found\n");
else
fprintf (fp_symbol_table, "exit 0x%0" PRIx64 "\n", pc_exit);
if (tohost_addr == -1)
fprintf (stdout, " No 'tohost' symbol found\n");
else
fprintf (fp_symbol_table, "tohost 0x%0" PRIx64 "\n", tohost_addr);
fclose (fp_symbol_table);
}
}
else {
fprintf (stdout, "Ignored\n");
}
}
elf_end (e);
fprintf (stdout, "Min addr: %16" PRIx64 " (hex)\n", min_addr);
fprintf (stdout, "Max addr: %16" PRIx64 " (hex)\n", max_addr);
}
// ================================================================
// Write out from word containing addr1 to word containing addr2
void write_mem_hex_file (FILE *fp, uint64_t addr1, uint64_t addr2)
{
const uint64_t bits_per_raw_mem_word = 256;
uint64_t bytes_per_raw_mem_word = bits_per_raw_mem_word / 8; // 32
uint64_t raw_mem_word_align_mask = (~ ((uint64_t) (bytes_per_raw_mem_word - 1)));
fprintf (stdout, "Subtracting 0x%08" PRIx64 " base from addresses\n", BASE_ADDR_B);
// Align the start and end addrs to raw mem words
uint64_t a1 = (addr1 & raw_mem_word_align_mask);
uint64_t a2 = ((addr2 + bytes_per_raw_mem_word - 1) & raw_mem_word_align_mask);
fprintf (fp, "@%07" PRIx64 " // raw_mem addr; byte addr: %08" PRIx64 "\n",
((a1 - BASE_ADDR_B) / bytes_per_raw_mem_word),
a1 - BASE_ADDR_B);
uint64_t addr;
for (addr = a1; addr < a2; addr += bytes_per_raw_mem_word) {
for (int j = (bytes_per_raw_mem_word - 1); j >= 0; j--)
fprintf (fp, "%02x", mem_buf [addr+j-MIN_MEM_ADDR_1GB]);
fprintf (fp, " // raw_mem addr %08" PRIx64 "; byte addr %08" PRIx64 "\n",
((addr - BASE_ADDR_B) / bytes_per_raw_mem_word),
(addr - BASE_ADDR_B));
}
// Write last word, if necessary, to avoid warnings about missing locations
if (addr < (MAX_MEM_ADDR_1GB - bytes_per_raw_mem_word)) {
addr = MAX_MEM_ADDR_1GB - bytes_per_raw_mem_word;
fprintf (fp, "@%07" PRIx64 " // last raw_mem addr; byte addr: %08" PRIx64 "\n",
((addr - BASE_ADDR_B) / bytes_per_raw_mem_word),
addr - BASE_ADDR_B);
for (int j = (bytes_per_raw_mem_word - 1); j >= 0; j--)
fprintf (fp, "%02x", 0);
fprintf (fp, " // raw_mem addr %08" PRIx64 "; byte addr %08" PRIx64 "\n",
((addr - BASE_ADDR_B) / bytes_per_raw_mem_word),
(addr - BASE_ADDR_B));
}
}
// ================================================================
void print_usage (FILE *fp, int argc, char *argv [])
{
fprintf (fp, "Usage:\n");
fprintf (fp, " %s --help\n", argv [0]);
fprintf (fp, " %s <ELF filename> <mem hex filename>\n", argv [0]);
fprintf (fp, "Reads ELF file and writes a Verilog Hex Memory image file\n");
fprintf (fp, "ELF file should have addresses within this range:\n");
fprintf (fp, "< Max: 0x%8" PRIx64 "\n", MAX_MEM_ADDR_1GB);
fprintf (fp, ">= Min: 0x%8" PRIx64 "\n", MIN_MEM_ADDR_1GB);
}
// ================================================================
int main (int argc, char *argv [])
{
if ((argc == 2) && (strcmp (argv [1], "--help") == 0)) {
print_usage (stdout, argc, argv);
return 0;
}
else if (argc != 3) {
print_usage (stderr, argc, argv);
return 1;
}
// Zero out the memory buffer before loading the ELF file
mem_buf = (uint8_t *)(calloc(MAX_MEM_SIZE, sizeof(uint8_t)));
if (mem_buf == NULL) {
fprintf (stderr, "ERROR: unable to allocate %lxMB for mem_buf\n", MAX_MEM_SIZE / 1024 / 1024);
return 1;
}
c_mem_load_elf (argv [1], "_start", "exit", "tohost");
if ((min_addr < BASE_ADDR_B) || (MAX_MEM_ADDR_1GB <= max_addr)) {
print_usage (stderr, argc, argv);
exit (1);
}
FILE *fp_out = fopen (argv [2], "w");
if (fp_out == NULL) {
fprintf (stderr, "ERROR: unable to open file '%s' for output\n", argv [2]);
return 1;
}
fprintf (stdout, "Writing mem hex to file '%s'\n", argv [2]);
write_mem_hex_file (fp_out, BASE_ADDR_B, max_addr);
// write_mem_hex_file (fp_out, BASE_ADDR_B, MAX_MEM_ADDR_1GB);
free(mem_buf);
fclose (fp_out);
}

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@@ -1,43 +0,0 @@
make -C ../../Tests/elf_to_hex
make[1]: Entering directory '/Users/akilan/Documents/Cheri/Test/Reverse/Test/Toooba/Tests/elf_to_hex'
make[1]: 'elf_to_hex' is up to date.
make[1]: Leaving directory '/Users/akilan/Documents/Cheri/Test/Reverse/Test/Toooba/Tests/elf_to_hex'
../../Tests/elf_to_hex/elf_to_hex ../../Tests/isa/rv64ui-p-add Mem.hex
c_mem_load_elf: ../../Tests/isa/rv64ui-p-add is a 64-bit ELF file
Section .text.init : addr 80000000 to addr 80000644; size 0x 644 (= 1604) bytes
Section .tohost : addr 80001000 to addr 80001048; size 0x 48 (= 72) bytes
Section .riscv.attributes: Ignored
Section .symtab : Searching for addresses of '_start', 'exit' and 'tohost' symbols
Writing symbols to: symbol_table.txt
No 'exit' label found
Section .strtab : Ignored
Section .shstrtab : Ignored
Min addr: 80000000 (hex)
Max addr: 80001047 (hex)
Writing mem hex to file 'Mem.hex'
Subtracting 0x80000000 base from addresses
./exe_HW_sim +v1 +tohost
================================================================
Bluespec RISC-V standalone system simulation v1.2
Copyright (c) 2017-2018 Bluespec, Inc. All Rights Reserved.
================================================================
2: top.dut_soc_top.rl_reset_start_initial ...
---- allocated socket for RVFI_DII
---- RVFI_DII_PORT environment variable not defined, using default port 5001 instead
---- RVFI_DII socket listening on port 5001
req addr: 'h0000000000000000, zeroed_0_start: 'h0000000000000000-'h0000000000040000, zeroed_1_start: 'h0000000001f80000-'h0000000001fffff8
req addr: 'h0000000000000000, zeroed_0_start: 'h0000000000000000-'h0000000000040000, zeroed_1_start: 'h0000000001f80000-'h0000000001fffff8
74: Mem_Controller.set_addr_map: addr_base 0x80000000 addr_lim 0xc0000000
SoC address map:
Boot ROM: 0x1000 .. 0x2000
Mem0 Controller: 0x80000000 .. 0xc0000000
UART0: 0xc0000000 .. 0xc0000080
74: top.dut_soc_top.rl_reset_complete_initial
INFO: watch_tohost 1, tohost_addr = 0x80001000, fromhost_addr = 0x0
75: top.dut_soc_top.method start (tohost 80001000, fromhost 0)
101: top.dut_soc_top.rl_step_0, n = 0, do_release
101: top.dut_soc_top do_release(restartRunning: True, to_host_addr: 0)
101: top.dut_soc_top.proc.method start: startpc 80000000, tohostAddr 0, fromhostAddr 0
102: top.dut_soc_top.rl_ctrl_req
102: top.dut_soc_top.proc.method start: startpc 80000000, tohostAddr 80001000, fromhostAddr 0
102: top.dut_soc_top do_release(restartRunning: True, to_host_addr: 80001000)

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@@ -1,134 +0,0 @@
@0000000 // raw_mem addr; byte addr: 00000000
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000000; byte addr 00000000
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000001; byte addr 00000020
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000002; byte addr 00000040
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000003; byte addr 00000060
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000004; byte addr 00000080
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000005; byte addr 000000a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000006; byte addr 000000c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000007; byte addr 000000e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000008; byte addr 00000100
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000009; byte addr 00000120
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000a; byte addr 00000140
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000b; byte addr 00000160
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000c; byte addr 00000180
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000d; byte addr 000001a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000e; byte addr 000001c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000000f; byte addr 000001e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000010; byte addr 00000200
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000011; byte addr 00000220
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000012; byte addr 00000240
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000013; byte addr 00000260
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000014; byte addr 00000280
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000015; byte addr 000002a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000016; byte addr 000002c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000017; byte addr 000002e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000018; byte addr 00000300
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000019; byte addr 00000320
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001a; byte addr 00000340
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001b; byte addr 00000360
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001c; byte addr 00000380
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001d; byte addr 000003a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001e; byte addr 000003c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000001f; byte addr 000003e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000020; byte addr 00000400
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000021; byte addr 00000420
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000022; byte addr 00000440
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000023; byte addr 00000460
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000024; byte addr 00000480
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000025; byte addr 000004a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000026; byte addr 000004c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000027; byte addr 000004e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000028; byte addr 00000500
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000029; byte addr 00000520
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002a; byte addr 00000540
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002b; byte addr 00000560
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002c; byte addr 00000580
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002d; byte addr 000005a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002e; byte addr 000005c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000002f; byte addr 000005e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000030; byte addr 00000600
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000031; byte addr 00000620
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000032; byte addr 00000640
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000033; byte addr 00000660
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000034; byte addr 00000680
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000035; byte addr 000006a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000036; byte addr 000006c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000037; byte addr 000006e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000038; byte addr 00000700
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000039; byte addr 00000720
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003a; byte addr 00000740
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003b; byte addr 00000760
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003c; byte addr 00000780
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003d; byte addr 000007a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003e; byte addr 000007c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000003f; byte addr 000007e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000040; byte addr 00000800
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000041; byte addr 00000820
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000042; byte addr 00000840
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000043; byte addr 00000860
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000044; byte addr 00000880
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000045; byte addr 000008a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000046; byte addr 000008c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000047; byte addr 000008e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000048; byte addr 00000900
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000049; byte addr 00000920
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004a; byte addr 00000940
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004b; byte addr 00000960
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004c; byte addr 00000980
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004d; byte addr 000009a0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004e; byte addr 000009c0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000004f; byte addr 000009e0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000050; byte addr 00000a00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000051; byte addr 00000a20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000052; byte addr 00000a40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000053; byte addr 00000a60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000054; byte addr 00000a80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000055; byte addr 00000aa0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000056; byte addr 00000ac0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000057; byte addr 00000ae0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000058; byte addr 00000b00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000059; byte addr 00000b20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005a; byte addr 00000b40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005b; byte addr 00000b60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005c; byte addr 00000b80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005d; byte addr 00000ba0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005e; byte addr 00000bc0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000005f; byte addr 00000be0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000060; byte addr 00000c00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000061; byte addr 00000c20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000062; byte addr 00000c40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000063; byte addr 00000c60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000064; byte addr 00000c80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000065; byte addr 00000ca0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000066; byte addr 00000cc0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000067; byte addr 00000ce0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000068; byte addr 00000d00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000069; byte addr 00000d20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006a; byte addr 00000d40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006b; byte addr 00000d60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006c; byte addr 00000d80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006d; byte addr 00000da0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006e; byte addr 00000dc0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000006f; byte addr 00000de0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000070; byte addr 00000e00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000071; byte addr 00000e20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000072; byte addr 00000e40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000073; byte addr 00000e60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000074; byte addr 00000e80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000075; byte addr 00000ea0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000076; byte addr 00000ec0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000077; byte addr 00000ee0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000078; byte addr 00000f00
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000079; byte addr 00000f20
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007a; byte addr 00000f40
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007b; byte addr 00000f60
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007c; byte addr 00000f80
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007d; byte addr 00000fa0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007e; byte addr 00000fc0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 0000007f; byte addr 00000fe0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000080; byte addr 00001000
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000081; byte addr 00001020
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 00000082; byte addr 00001040
@07fffff // last raw_mem addr; byte addr: 0fffffe0
0000000000000000000000000000000000000000000000000000000000000000 // raw_mem addr 007fffff; byte addr 0fffffe0

View File

@@ -11,8 +11,8 @@ BSC_COMPILATION_FLAGS += -verbose
# TEST ?= rv64ui-p-add
# TEST ?= rv64um-v-mulw
# TEST ?= Page
# TEST ?= PageReadWrite
TEST ?= CheriPage
TEST ?= PageReadWrite
# TEST ?= CheriPage
#================================================================
# Parameter settings for MIT RISCY, setup paths etc. for Include_Common

File diff suppressed because it is too large Load Diff

View File

View File

@@ -531,7 +531,14 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
if(x.regs.src1 matches tagged Valid .src1 &&& src1 != 0) begin
rVal1 <- readRFBypass(src1, regsReady.src1, inIfc.rf_rd1(src1), bypassWire);
end
if (x.ddc_offset) rVal1 = setAddr(ddc, getAddr(rVal1)).value;
if (x.ddc_offset) begin
$display("calling set address");
rVal1 = setAddr(ddc, getAddr(rVal1)).value;
end
else begin
$display("no called set address");
end
$display("outside if and else");
// get rVal2 (check bypass)
CapPipe rVal2 = nullCap;
@@ -598,6 +605,7 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
endrule
rule doExeMem;
$display("do exe");
regToExeQ.deq;
let regToExe = regToExeQ.first;
let x = regToExe.data;
@@ -650,6 +658,7 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
endrule
rule doFinishMem;
$display("do finish mem");
// trollToExeQ.deq;
// let regToExe = trollToExeQ.first;
// let lol = regToExe.data;

View File

@@ -562,6 +562,7 @@ module mkDTlb#(
// bare mode
pendWait[idx] <= None;
pendResp[idx] <= tuple3(r.addr, Invalid, True);
$display("bare mode");
if(verbose) $display("DTLB %m req (bare): ", fshow(r));
end

View File

@@ -1,647 +0,0 @@
// Copyright (c) 2017 Massachusetts Institute of Technology
//
//-
// RVFI_DII + CHERI modifications:
// Copyright (c) 2020 Alexandre Joannou
// Copyright (c) 2020 Peter Rugg
// Copyright (c) 2020 Jonathan Woodruff
// Copyright (c) 2021 Marno van der Maas
// All rights reserved.
//
// This software was developed by SRI International and the University of
// Cambridge Computer Laboratory (Department of Computer Science and
// Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
// DARPA SSITH research programme.
//
// This work was supported by NCSC programme grant 4212611/RFA 15971 ("SafeBet").
//-
//
// Permission is hereby granted, free of charge, to any person
// obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without
// restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies
// of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be
// included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
// ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
`include "ProcConfig.bsv"
import Types::*;
import ProcTypes::*;
import Vector::*;
import CHERICap::*;
import CHERICC_Fat::*;
import ISA_Decls_CHERI::*;
import CacheUtils::*; // For CLoadTags alignment
(* noinline *)
function Maybe#(CSR_XCapCause) capChecksExec(CapPipe a, CapPipe b, CapPipe ddc, CapChecks toCheck, ImmData imm);
function Maybe#(CSR_XCapCause) e1(CHERIException e) = Valid(CSR_XCapCause{cheri_exc_reg: toCheck.rn1, cheri_exc_code: e});
function Maybe#(CSR_XCapCause) e2(CHERIException e) = Valid(CSR_XCapCause{cheri_exc_reg: toCheck.rn2, cheri_exc_code: e});
function Maybe#(CSR_XCapCause) eDDC(CHERIException e) = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1, pack(scrAddrDDC)}, cheri_exc_code: e});
Maybe#(CSR_XCapCause) result = Invalid;
if (toCheck.src1_tag && !isValidCap(a))
result = e1(cheriExcTagViolation);
else if (toCheck.src2_tag && !isValidCap(b))
result = e2(cheriExcTagViolation);
else if (toCheck.src1_unsealed_or_sentry && isValidCap(a) && (getKind(a) != UNSEALED) && (getKind(a) != SENTRY))
result = e1(cheriExcSealViolation);
else if (toCheck.src1_unsealed_or_imm_zero && isValidCap(a) && (getKind(a) != UNSEALED) && (imm != 0))
result = e1(cheriExcSealViolation);
else if (toCheck.src1_sealed_with_type && (getKind (a) matches tagged SEALED_WITH_TYPE .t ? False : True))
result = e1(cheriExcSealViolation);
else if (toCheck.src2_sealed_with_type && (getKind (b) matches tagged SEALED_WITH_TYPE .t ? False : True))
result = e2(cheriExcSealViolation);
else if (toCheck.src1_type_not_reserved && !validAsType(a, zeroExtend(getKind(a).SEALED_WITH_TYPE)))
result = e1(cheriExcTypeViolation);
else if (toCheck.src1_src2_types_match && getKind(a).SEALED_WITH_TYPE != getKind(b).SEALED_WITH_TYPE)
result = e1(cheriExcTypeViolation);
else if (toCheck.src1_permit_ccall && !getHardPerms(a).permitCCall)
result = e1(cheriExcPermitCCallViolation);
else if (toCheck.src2_permit_ccall && !getHardPerms(b).permitCCall)
result = e2(cheriExcPermitCCallViolation);
else if (toCheck.src1_permit_x && !getHardPerms(a).permitExecute)
result = e1(cheriExcPermitXViolation);
else if (toCheck.src2_no_permit_x && getHardPerms(b).permitExecute)
result = e2(cheriExcPermitXViolation);
return result;
endfunction
(* noinline *)
function Maybe#(CSR_XCapCause) capChecksMem(CapPipe auth, CapPipe data, CapChecks toCheck, MemFunc mem_func, ByteOrTagEn byteOrTagEn);
function Maybe#(CSR_XCapCause) eAuth(CHERIException e) = Valid(CSR_XCapCause{cheri_exc_reg: case (toCheck.check_authority_src) matches Src1: toCheck.rn1;
Ddc: {1'b1, pack(scrAddrDDC)};
endcase
, cheri_exc_code: e});
Maybe#(CSR_XCapCause) result = Invalid;
match {.isLoad, .isStore} = case (mem_func)
Ld, Lr: tuple2(True, False);
St, Sc: tuple2(False, True);
Amo: tuple2(True, True);
endcase;
Bool storeValidCap = isStore && isValidCap(data) && byteOrTagEn == DataMemAccess(replicate(True));
if (!isValidCap(auth))
result = eAuth(cheriExcTagViolation);
else if (getKind(auth) != UNSEALED)
result = eAuth(cheriExcSealViolation);
else if (isLoad && !getHardPerms(auth).permitLoad)
result = eAuth(cheriExcPermitRViolation);
else if (isLoad && !getHardPerms(auth).permitLoadCap && byteOrTagEn == TagMemAccess)
result = eAuth(cheriExcPermitRCapViolation);
else if (isStore && !getHardPerms(auth).permitStore)
result = eAuth(cheriExcPermitWViolation);
else if (storeValidCap && !getHardPerms(auth).permitStoreCap)
result = eAuth(cheriExcPermitWCapViolation);
else if (storeValidCap && !getHardPerms(auth).permitStoreLocalCap && !getHardPerms(data).global)
result = eAuth(cheriExcPermitWLocalCapViolation);
return result;
endfunction
(* noinline *)
function Maybe#(BoundsCheck) prepareBoundsCheck(CapPipe a, CapPipe b, CapPipe pcc,
CapPipe ddc, Data vaddr, Bit#(TAdd#(CacheUtils::LogCLineNumMemDataBytes,1)) size, // These two are only used in the memory pipe. May factor into two functions later.
CapChecks toCheck);
BoundsCheck ret = ?;
CapPipe authority = ?;
case(toCheck.check_authority_src)
Src1: begin
authority = a;
ret.authority_idx = toCheck.rn1;
end
Src2: begin
authority = b;
ret.authority_idx = toCheck.rn2;
end
Pcc: begin
authority = pcc;
ret.authority_idx = {1'b1, pack(scrAddrPCC)};
end
Ddc: begin
authority = ddc;
ret.authority_idx = {1'b1, pack(scrAddrDDC)};
end
endcase
ret.authority_base = getBase(authority);
ret.authority_top = getTop(authority);
case(toCheck.check_low_src)
Src1Addr: ret.check_low = getAddr(a);
Src1Base: ret.check_low = getBase(a);
Src1Type: ret.check_low = zeroExtend(getKind(a).SEALED_WITH_TYPE);
Src2Addr: ret.check_low = getAddr(b);
Vaddr: ret.check_low = vaddr;
endcase
case(toCheck.check_high_src)
Src1AddrPlus2: ret.check_high = {1'b0,getAddr(a)+2};
Src1Top: ret.check_high = getTop(a);
Src1Type: ret.check_high = zeroExtend(getKind(a).SEALED_WITH_TYPE);
Src2Addr: ret.check_high = {1'b0,getAddr(b)};
ResultTop: ret.check_high = {1'b0,getAddr(a)} + {1'b0,getAddr(b)};
VaddrPlusSize: ret.check_high = {1'b0,vaddr} + zeroExtend(size);
endcase
ret.check_inclusive = toCheck.check_inclusive;
if (toCheck.check_enable) return Valid(ret);
else return Invalid;
endfunction
(* noinline *)
function Data alu(Data a, Data b, AluFunc func);
Data res = (case(func)
Add : (a + b);
Addw : signExtend((a + b)[31:0]);
Sub : (a - b);
Subw : signExtend((a[31:0] - b[31:0])[31:0]);
And : (a & b);
Or : (a | b);
Xor : (a ^ b);
Slt : zeroExtend( pack( signedLT(a, b) ) );
Sltu : zeroExtend( pack( a < b ) );
Sll : (a << b[5:0]);
Sllw : signExtend((a[31:0] << b[4:0])[31:0]);
Srl : (a >> b[5:0]);
Sra : signedShiftRight(a, b[5:0]);
Srlw : signExtend((a[31:0] >> b[4:0])[31:0]);
Sraw : signExtend(signedShiftRight(a[31:0], b[4:0])[31:0]);
Csrw : b;
Csrs : (a | b); // same as Or
Csrc : (a & ~b);
default : 0;
endcase);
return res;
endfunction
(* noinline *)
function CapPipe setBoundsALU(CapPipe cap, Data len, SetBoundsFunc boundsOp);
let combinedResult = setBoundsCombined(cap, len);
CapPipe res = (case (boundsOp) matches
SetBoundsRounding: combinedResult.cap;
SetBoundsExact: combinedResult.cap;
CRRL: nullWithAddr(combinedResult.length);
CRAM: nullWithAddr(combinedResult.mask);
endcase);
if (!combinedResult.inBounds) res = setValidCap(res, False);
if (boundsOp == SetBoundsExact && !combinedResult.exact) res = setValidCap(res, False);
return res;
endfunction
(* noinline *)
function CapPipe specialRWALU(CapPipe cap, CapPipe oldCap, SpecialRWFunc scrType);
function csrOp (oldAddr, val, f) =
case (f)
Write: val;
Set: (oldAddr | val);
Clear: (oldAddr & ~val);
endcase;
let addr = getAddr(cap);
let oldAddr = getAddr(oldCap);
CapPipe res = (case (scrType) matches
tagged TVEC .csrf: update_scr_via_csr(oldCap, csrOp(oldAddr, getAddr(cap), csrf) & ~64'h2, False);
tagged EPC .csrf: update_scr_via_csr(oldCap, csrOp(oldAddr, getAddr(cap), csrf) & ~64'h1, False);
tagged TCC: update_scr_via_csr(cap, addr & ~64'h2, False); // Mask out bit 1
tagged EPCC: update_scr_via_csr(cap, addr & ~64'h1, addr[0] == 1'b0); // Mask out bit 0
tagged Normal: cap;
endcase);
return res;
endfunction
function Tuple2#(Data, Bool) extractType(CapPipe a);
if (getKind(a) == UNSEALED) return tuple2(otype_unsealed_ext, True);
else if (getKind(a) == SENTRY ) return tuple2(otype_sentry_ext, True);
else if (getKind(a) == RES0 ) return tuple2(otype_res0_ext, True);
else if (getKind(a) == RES1 ) return tuple2(otype_res1_ext, True);
else return tuple2(zeroExtend(getKind(a).SEALED_WITH_TYPE), False);
endfunction
function CapPipe clearTagIf(CapPipe a, Bool cond);
return setValidCap(a, isValidCap(a) && !cond);
endfunction
(* noinline *)
function CapPipe capModify(CapPipe a, CapPipe b, CapModifyFunc func);
let a_mut = setValidCap(a, isValidCap(a) && getKind(a) == UNSEALED);
let b_mut = setValidCap(b, isValidCap(b) && getKind(b) == UNSEALED);
match {.a_type, .a_res} = extractType(a);
Bool sealPassthrough = !isValidCap(b) || getKind(a) != UNSEALED || !isInBounds(b, False) || getAddr(b) == otype_unsealed_ext;
Bool sealIllegal = getKind(b) != UNSEALED || !getHardPerms(b).permitSeal || !validAsType(b, getAddr(b));
let new_hard_perms = getHardPerms(a);
new_hard_perms.global = new_hard_perms.global && getHardPerms(b).global;
Bool unsealIllegal = !isValidCap(b) || getKind(b) != UNSEALED || getKind(a) == UNSEALED || a_res || getAddr(b) != a_type || !getHardPerms(b).permitUnseal || !isInBounds(b, False);
Bool buildCapIllegal = !isValidCap(b) || getKind(b) != UNSEALED || !isDerivable(a) || (getPerms(a) & getPerms(b)) != getPerms(a) || getBase(a) < getBase(b) || getTop(a) > getTop(b); // XXX needs optimisation
CapPipe res = (case(func) matches
tagged ModifyOffset .offsetOp :
modifyOffset(a_mut, getAddr(b), offsetOp == IncOffset).value;
tagged SetBounds .boundsOp :
setBoundsALU(a_mut, getAddr(b), boundsOp);
tagged SpecialRW .scrType :
case (scrType) matches
tagged TCC: b;
tagged EPCC: b;
tagged Normal: b;
tagged TVEC ._: nullWithAddr(getAddr(b));
tagged EPC ._: nullWithAddr(getAddr(b));
endcase
tagged SetAddr .addrSource :
clearTagIf(setAddr(b_mut, (addrSource == Src1Type) ? a_type : getAddr(a) ).value, (addrSource == Src1Type) ? a_res : False);
tagged SealEntry :
setKind(a_mut, SENTRY);
tagged Seal :
clearTagIf( setKind(a_mut, SEALED_WITH_TYPE (truncate(getAddr(b))))
, sealPassthrough || sealIllegal);
tagged CSeal :
(sealPassthrough ? a :
clearTagIf(setKind(a_mut, SEALED_WITH_TYPE (truncate(getAddr(b)))), sealIllegal));
tagged Unseal .src :
clearTagIf(setHardPerms(setKind(((src == Src1) ? a:b), UNSEALED), new_hard_perms), (src == Src1) && unsealIllegal);
tagged AndPerm :
setPerms(a_mut, pack(getPerms(a)) & truncate(getAddr(b)));
tagged SetFlags :
setFlags(a_mut, truncate(getAddr(b)));
tagged FromPtr :
(getAddr(a) == 0 ? nullCap : setAddr(b_mut, getAddr(a)).value);
tagged SetHigh:
fromMem(tuple2(False, {getAddr(b), getAddr(a)}));
tagged BuildCap :
setKind(setValidCap(a_mut, !buildCapIllegal), getKind(a)==SENTRY ? SENTRY : UNSEALED);
tagged Move :
a;
tagged ClearTag :
setValidCap(a, False);
default: ?;
endcase);
return res;
endfunction
(* noinline *)
function Data capInspect(CapPipe a, CapPipe b, CapInspectFunc func);
Data res = (case(func) matches
tagged TestSubset :
// TODO will be bad for timing. Would like to reuse bounds check
zeroExtend(pack( (isValidCap(b) == isValidCap(a))
&& ((getPerms(a) & getPerms(b)) == getPerms(a))
&& (getBase(a) >= getBase(b))
&& (getTop(a) <= getTop(b))));
tagged SetEqualExact :
zeroExtend(pack(toMem(a) == toMem(b)));
tagged GetLen :
truncate(getLength(a));
tagged GetBase :
getBase(a);
tagged GetTag :
zeroExtend(pack(isValidCap(a)));
tagged GetSealed :
zeroExtend(pack(getKind(a) != UNSEALED));
tagged GetAddr :
getAddr(a);
tagged GetOffset :
getOffset(a);
tagged GetFlags :
zeroExtend(getFlags(a));
tagged GetPerm :
zeroExtend(getPerms(a));
tagged GetHigh :
zeroExtend(tpl_2(toMem(a))[127:64]);
tagged GetType :
tpl_1(extractType(a));
tagged ToPtr :
(isValidCap(a) ? getAddr(a) - getBase(b) : 0);
default: ?;
endcase);
return res;
endfunction
function CapPipe capALU(CapPipe a, CapPipe b, CapFunc func);
CapPipe res = (case (func) matches
tagged CapInspect .x:
nullWithAddr(capInspect(a,b,func.CapInspect));
default:
capModify(a,b,func.CapModify);
endcase);
return res;
endfunction
(* noinline *)
function Bool aluBr(Data a, Data b, BrFunc brFunc);
Bool brTaken = (case(brFunc)
Eq : (a == b);
Neq : (a != b);
Lt : signedLT(a, b);
Ltu : (a < b);
Ge : signedGE(a, b);
Geu : (a >= b);
AT : True;
NT : False;
default : False;
endcase);
return brTaken;
endfunction
(* noinline *)
function CapPipe brAddrCalc(CapPipe pc, CapPipe val, IType iType, Data imm, Bool taken, Bit #(32) orig_inst, Bool cap);
CapPipe pcPlusN = addPc(pc, ((orig_inst [1:0] == 2'b11) ? 4 : 2));
//if (!cap) val = setOffset(pc, getAddr(val)).value;
//CapPipe branchTarget = incOffset(pc, imm).value;
//CapPipe jumpTarget = incOffset(val, imm).value;
CapPipe nextPc = pc;
Data offset = imm;
Bool doInc = True;
if (iType==Jr || iType==CCall || iType ==CJALR) begin
if (cap) nextPc = val;
else begin
offset = getAddr(val) + imm;
doInc = False;
end
end
CapPipe targetAddr = ?;
if(doInc) targetAddr = modifyOffset(nextPc, offset, doInc).value;
else targetAddr = setAddr(nextPc, offset).value;
// jumpTarget.address[0] = 1'b0;
targetAddr = setAddrUnsafe(targetAddr, {truncateLSB(getAddr(targetAddr)), 1'b0});
targetAddr = setKind(targetAddr, UNSEALED); // It is checked elsewhere that we have an unsealed cap already, or sentry if permitted
return (case (iType)
J, CJAL, Jr, CCall, CJALR: targetAddr;
Br : (taken ? targetAddr : pcPlusN);
default : pcPlusN;
endcase);
endfunction
/*
(* noinline *)
function ControlFlow getControlFlow(DecodedInst dInst, Data rVal1, Data rVal2, Addr pc, Addr ppc, Bit #(32) orig_inst);
ControlFlow cf = unpack(0);
Bool taken = dInst.execFunc matches tagged Br .br_f ? aluBr(rVal1, rVal2, br_f) : False;
Addr nextPc = brAddrCalc(pc, rVal1, dInst.iType, validValue(getDInstImm(dInst)), taken, orig_inst);
Bool mispredict = nextPc != ppc;
cf.pc = pc;
cf.nextPc = nextPc;
cf.taken = taken;
cf.mispredict = mispredict;
return cf;
endfunction
*/
(* noinline *)
function ExecResult basicExec(DecodedInst dInst, CapPipe rVal1, CapPipe rVal2, CapPipe pcc, CapPipe ppc, Bit #(32) orig_inst);
// just data, addr, and control flow
CapPipe data = nullCap;
CapPipe addr = nullCap;
Bool newPcc = dInst.iType == CJALR || dInst.iType == CCall;
ControlFlow cf = ControlFlow{pc: pcc, nextPc: nullCap, taken: False, newPcc: newPcc, mispredict: False};
Maybe#(CapPipe) capImm = isValid(getDInstImm(dInst)) ? Valid (nullWithAddr(getDInstImm(dInst).Valid)) : Invalid;
let aluVal2 = dInst.capFunc matches tagged CapModify .cm &&& cm matches tagged SpecialRW ._ ? rVal2 : fromMaybe(rVal2, capImm);
// Get the alu function. By default, it adds. This is used by memory instructions
AluFunc alu_f = dInst.execFunc matches tagged Alu .alu_f ? alu_f : Add;
Data alu_result = alu(getAddr(rVal1), getAddr(aluVal2), alu_f);
CapPipe cap_alu_result = capALU(rVal1, aluVal2, dInst.capFunc);
CapPipe link_pcc = addPc(pcc, ((orig_inst [1:0] == 2'b11) ? 4 : 2));
// Default branch function is not taken
BrFunc br_f = dInst.execFunc matches tagged Br .br_f ? br_f : NT;
cf.taken = aluBr(getAddr(rVal1), getAddr(rVal2), br_f);
cf.nextPc = brAddrCalc(pcc, rVal1, dInst.iType, fromMaybe(0,getDInstImm(dInst)), cf.taken, orig_inst, newPcc);
Maybe#(CSR_XCapCause) capException = capChecksExec(rVal1, aluVal2, nullCap, dInst.capChecks, dInst.imm.Valid);
if (dInst.execFunc matches tagged Br .unused) begin
rVal1 = cf.nextPc;
if (!cf.taken) dInst.capChecks.check_enable = False;
end
Maybe#(BoundsCheck) boundsCheck = prepareBoundsCheck(rVal1, aluVal2, pcc,
nullCap, 0, 0, // These three are only used in the memory pipe
dInst.capChecks);
cf.nextPc = setKind(cf.nextPc, UNSEALED);
cf.mispredict = cf.nextPc != ppc;
data = (case (dInst.iType)
St : rVal2;
Sc : rVal2;
Amo : rVal2;
J : nullWithAddr(getAddr(link_pcc));
CJAL : setKind(link_pcc, SENTRY);
CCall : cap_alu_result;
CJALR : setKind(link_pcc, SENTRY);
Jr : nullWithAddr(getAddr(link_pcc));
Auipc : nullWithAddr(getAddr(pcc) + getDInstImm(dInst).Valid);
Auipcc : incOffset(pcc, getDInstImm(dInst).Valid).value; // could be computed with alu
Csr : rVal1;
Scr : cap_alu_result;
Cap : cap_alu_result;
default : nullWithAddr(alu_result);
endcase);
CapMem csr_data = (case (dInst.iType)
Scr: cast(specialRWALU(fromMaybe(rVal1, capImm), rVal2, dInst.capFunc.CapModify.SpecialRW));
default: nullWithAddr(alu_result);
endcase);
addr = (case (dInst.iType)
Ld, St, Lr, Sc, Amo : nullWithAddr(alu_result);
default : cf.nextPc; //TODO should this be nullified?
endcase);
return ExecResult{data: data, csrData: csr_data, addr: addr, controlFlow: cf, capException: capException, boundsCheck: boundsCheck};
endfunction
(* noinline *)
function Maybe#(Trap) checkForException(
DecodedInst dInst,
ArchRegs regs,
CsrDecodeInfo csrState,
CapMem pcc,
Bool fourByteInst
); // regs needed to check if x0 is a src
Maybe#(Trap) exception = Invalid;
let prv = csrState.prv;
if(dInst.iType == Ecall) begin
exception = Valid (Exception (case(prv)
prvU: excEnvCallU;
prvS: excEnvCallS;
prvM: excEnvCallM;
default: excIllegalInst;
endcase));
end
else if(dInst.iType == Ebreak) begin
exception = Valid (Exception (excBreakpoint));
end
else if(dInst.iType == Mret) begin
if(prv < prvM) begin
exception = Valid (Exception (excIllegalInst));
end
else if (!getHardPerms(pcc).accessSysRegs) begin
exception = Valid (CapException (CSR_XCapCause {cheri_exc_reg: {1'b1, pack(scrAddrPCC)}, cheri_exc_code: cheriExcPermitASRViolation}));
end
end
else if(dInst.iType == Sret) begin
if(prv < prvS) begin
exception = Valid (Exception (excIllegalInst));
end
else if(prv == prvS && csrState.trapSret) begin
exception = Valid (Exception (excIllegalInst));
end
else if (!getHardPerms(pcc).accessSysRegs) begin
exception = Valid (CapException (CSR_XCapCause {cheri_exc_reg: {1'b1, pack(scrAddrPCC)}, cheri_exc_code: cheriExcPermitASRViolation}));
end
end
else if(dInst.iType == SFence) begin
if(prv == prvS && csrState.trapVM) begin
exception = Valid (Exception (excIllegalInst));
end
end
else if(dInst.iType == Csr) begin
let csr = pack(fromMaybe(csrAddrNone, dInst.csr));
Bool csr_has_priv = (prv >= csr[9:8]);
if(!csr_has_priv) begin
exception = Valid (Exception (excIllegalInst));
end
else if(prv == prvS && csrState.trapVM &&
validValue(dInst.csr) == csrAddrSATP) begin
exception = Valid (Exception (excIllegalInst));
end
let rs1 = case (regs.src2) matches
tagged Valid (tagged Gpr .r) : r;
default: 0;
endcase;
let imm = case (dInst.imm) matches
tagged Valid .n: n;
default: 0;
endcase;
Bool writes_csr = ((dInst.execFunc == tagged Alu Csrw) || (rs1 != 0) || (imm != 0));
Bool read_only = (csr [11:10] == 2'b11);
Bool write_deny = (writes_csr && read_only);
Bool asr_allow = getHardPerms(pcc).accessSysRegs
|| ((pack(csrAddrHPMCOUNTER3) <= csr) && (csr <= pack(csrAddrHPMCOUNTER31)) && !writes_csr)
|| (csr == pack(csrAddrFFLAGS))
|| (csr == pack(csrAddrFRM))
|| (csr == pack(csrAddrFCSR))
|| (csr == pack(csrAddrCYCLE) && !writes_csr)
|| (csr == pack(csrAddrTIME) && !writes_csr)
|| (csr == pack(csrAddrINSTRET) && !writes_csr);
Bool unimplemented = (csr == pack(csrAddrNone)); // Added by Bluespec
if (write_deny || !csr_has_priv || unimplemented) begin
exception = Valid (Exception (excIllegalInst));
end else if (!asr_allow) begin
exception = Valid (CapException (CSR_XCapCause {cheri_exc_reg: {1'b1, pack(scrAddrPCC)}, cheri_exc_code: cheriExcPermitASRViolation}));
end
end
else if(dInst.scr matches tagged Valid .scr) begin
Bool scr_has_priv = (prv >= pack(scr)[4:3]);
Bool unimplemented = (scr == scrAddrNone);
Bool writes_scr = regs.src1 == Valid (tagged Gpr 0) ? False : True;
Bool read_only = (scr == scrAddrPCC);
Bool write_deny = (writes_scr && read_only);
Bool asr_allow = getHardPerms(pcc).accessSysRegs ||
scr == scrAddrDDC || scr == scrAddrPCC;
if(!scr_has_priv || unimplemented || write_deny) begin
exception = Valid (Exception (excIllegalInst));
end else if (!asr_allow) begin
exception = Valid (CapException (CSR_XCapCause {cheri_exc_reg: {1'b1, pack(scrAddrPCC)}, cheri_exc_code: cheriExcPermitASRViolation}));
end
end
else if(dInst.iType == Fpu) begin
if(dInst.execFunc matches tagged Fpu .fpu_f) begin
// Get rounding mode
let rm = (fpu_f.rm == rmRDyn) ? unpack(csrState.frm) : fpu_f.rm;
case(rm)
rmRNE, rmRTZ, rmRDN, rmRUP, rmRMM: exception = exception; // legal modes
default : exception = Valid (Exception (excIllegalInst));
endcase
end
else begin
// Fpu instruction without FPU execFunc
exception = Valid (Exception (excIllegalInst));
end
end
// Check that the end of the instruction is in bounds of PCC.
CapPipe pcc_end = cast(addPc(pcc, (fourByteInst?4:2)));
CapPipe pcc_start = cast(pcc);
Maybe#(CSR_XCapCause) capException = Invalid;
if (!isValidCap(pcc_start)) capException = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1,pack(scrAddrPCC)}, cheri_exc_code: cheriExcTagViolation});
if (getKind(pcc_start) != UNSEALED) capException = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1,pack(scrAddrPCC)}, cheri_exc_code: cheriExcSealViolation});
if (!getHardPerms(pcc_start).permitExecute) capException = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1,pack(scrAddrPCC)}, cheri_exc_code: cheriExcPermitXViolation});
if (!isInBounds(pcc_end, True)) capException = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1,pack(scrAddrPCC)}, cheri_exc_code: cheriExcLengthViolation});
if (!isInBounds(pcc_start, True)) capException = Valid(CSR_XCapCause{cheri_exc_reg: {1'b1,pack(scrAddrPCC)}, cheri_exc_code: cheriExcLengthViolation});
Maybe#(Trap) retval = Invalid;
if (capException matches tagged Valid .ce) retval = Valid(CapException(ce));
else retval = exception;
return retval;
endfunction
// check mem access misaligned: byteEn is unshifted (just from Decode)
function Bool memAddrMisaligned(Addr addr, ByteOrTagEn byteOrTagEn);
MemDataByteEn byteEn = byteOrTagEn.DataMemAccess;
if (byteOrTagEn == TagMemAccess) begin
return(!isCLineAlignAddr(addr));
end
else if(byteEn[15]) begin
return addr[3:0] != 0;
end
else if(byteEn[7]) begin
return addr[2:0] != 0;
end
else if(byteEn[3]) begin
return addr[1:0] != 0;
end
else if(byteEn[1]) begin
return addr[0] != 0;
end
else begin
return False;
end
endfunction
function MemTaggedData gatherLoad( Addr addr, ByteOrTagEn byteOrTagEn
, Bool unsignedLd, MemTaggedData data);
function extend = unsignedLd ? zeroExtend : signExtend;
Bit#(IndxShamt) offset = truncate(addr);
MemDataByteEn byteEn = byteOrTagEn.DataMemAccess;
if((byteOrTagEn == TagMemAccess) || pack(byteEn) == ~0) return data;
else if(byteEn[7]) begin
Vector#(2, Bit#(64)) dataVec = unpack(pack(data.data));
return dataToMemTaggedData(extend(dataVec[offset[3]]));
end else if(byteEn[3]) begin
Vector#(4, Bit#(32)) dataVec = unpack(pack(data.data));
return dataToMemTaggedData(extend(dataVec[offset[3:2]]));
end else if(byteEn[1]) begin
Vector#(8, Bit#(16)) dataVec = unpack(pack(data.data));
return dataToMemTaggedData(extend(dataVec[offset[3:1]]));
end else begin
Vector#(16, Bit#(8)) dataVec = unpack(pack(data.data));
return dataToMemTaggedData(extend(dataVec[offset]));
end
endfunction
function Tuple2#(ByteEn, Data) scatterStore(Addr addr, ByteEn byteEn, Data data);
Bit#(IndxShamt) offset = truncate(addr);
if(byteEn[7]) begin
return tuple2(byteEn, data);
end else if(byteEn[3]) begin
return tuple2(unpack(pack(byteEn) << (offset)), data << {(offset), 3'b0});
end else if(byteEn[1]) begin
return tuple2(unpack(pack(byteEn) << (offset)), data << {(offset), 3'b0});
end else begin
return tuple2(unpack(pack(byteEn) << (offset)), data << {(offset), 3'b0});
end
endfunction

View File

@@ -1,12 +0,0 @@
Let me know if this message works well on behalf of all of us.
Hi Jan,
This is a very small gesture from Jose, Mathews, Yukang and Akilan. We have transferred 200 pounds equally contributed by all of us. As you are moving in and settling into your new place, we hope this can help you and Samantha cover certain expenses like buying furniture or for your very efficient interrail travel pass in the near future.
We will definetely miss the german embassy in Slatefort. Happy new year in advance from all of us!
Regards,
Jose, Mathews, Yukang and Akilan
(Your UK representation of transportation
reform)