Files
Toooba/src_Core/CPU/CsrFile.bsv
rsnikhil 40b55d2c32 Fixed a Tandem-Verification issue (report MIP change due to interrupts).
CSR MIP can change due to external/timer interrupts.  These non-instruction-related
changes were not being reported to the Tandem Verifier.
2020-03-03 18:34:00 -05:00

45 KiB