jon b4b7718aa2 Sort of support 2 cores for starting and halting.

2020-10-08 15:09:23 +01:00

..

Core.bsv

Bump BSV-RVFI-DII and refactor to support new parcel-based interface

2020-07-21 14:36:36 +01:00

CPU_Decode_C.bsv

Add CHERI+RVFI_DII grant codes and copyrights

2020-07-06 17:39:25 +01:00

CsrFile.bsv

Replace enums-for-constants with structs wrapping a plain Bit#(n)

2020-07-15 03:16:24 +01:00

LLC_AXI4_Adapter.bsv

LLC_AXI4_Adapter.bsv: Make more obviously correct

2020-07-06 19:01:56 +01:00

MMIO_AXI4_Adapter.bsv

Prevent instruction fetch to unexpected devices

2020-07-10 17:35:06 +01:00

MMIOPlatform.bsv

2-byte aligned instruction memory to simplify compressed instruction

2020-07-24 12:38:37 +01:00

Proc_IFC.bsv

Bump BSV-RVFI-DII and refactor to support new parcel-based interface

2020-07-21 14:36:36 +01:00

Proc.bsv

Sort of support 2 cores for starting and halting.

2020-10-08 15:09:23 +01:00