We needlessly casted to CapPipe then FpuMulDivExePipeline had to
internally get the address and construct null-derived capabilities. Push
all this out to the Core so that it just deals with Data again. This is
unlikely to affect area as any sane optimiser would have optimised all
this away, but this is cleaner code, with the benefit that the FPU no
longer cares if the physical register file is unified or split between
GPCRs and FPRs.
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