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299 Commits

Author SHA1 Message Date
Jonathan Woodruff
75d1afe8b4 Only push to RAS when the linking instruction is non-speculative. 
That is, don't push in Decode, push from the training structure coming
from Execute, which is delayed until the instruction that issued it is
non-speculative.
 2022-02-18 13:22:02 +00:00
Jonathan Woodruff
4961d321b9 Merge branch 'CHERI' into jdw57_prediction 2022-02-16 10:10:00 +00:00
Jonathan Woodruff
05df76073b Revert some unintended changes from the last commit. 2022-02-01 11:08:37 +00:00
Jonathan Woodruff
01132d165a Enable tracing of physical addresses for RVFI (if PADDR_RVFI is 
defined).
This is done by adding a vector of padder lookup interfaces to the load
store queue.
This should help with targeted memory translation debugging, and also
with compatability with the current Sail RVFI implemenation which is
probably incorrect with respect to the RVFI spec which calls for virtual
addresses in the maddr field.
 2022-02-01 09:10:48 +00:00
Jonathan Woodruff
ad5d5aca0d Also pause branch execution when there is a pending wrong speculation. 2022-01-31 12:36:17 +00:00
Jonathan Woodruff
a56deab46c Simpelest strategy for making wrongSpec not conflict with loads of 
rules.
This triggers some assertions in the ROB what should be dealt with
properly if this is going to work.
 2022-01-31 12:36:17 +00:00
Jonathan Woodruff
4fbb7b5648 A version that seems to actually run. 
The buffer in GlobalSpecUpdate has to be a SpecFifo.
 2022-01-31 12:09:38 +00:00
Jonathan Woodruff
c1c4a46b1e Simpelest strategy for making wrongSpec not conflict with loads of 
rules.
This triggers some assertions in the ROB what should be dealt with
properly if this is going to work.
 2022-01-31 12:09:38 +00:00
Jonathan Woodruff
4cfd652b0d Use mkRegOR in register file. 2022-01-25 20:42:16 +00:00
Jonathan Woodruff
e497091e18 A timing optimisation for the direction predictor. 
Add a "nextPc" interface so that lookup can begin in the previous cycle.
Remove the "pc" operands in the vector of lookup interfaces,
but rather derive the PC from lookup from the first PC being looked up
in that cycle. That is, by adding 4*(interface number) to the beginning
lookup PC.  As this might not actually be the PC of the instruction,
pass the index you used with the training info so that you are certain
to train with the same index you looked up.

This has less than 1% overhead in CoreMark.

This is a general improvement for reasonable timing which should be upstreamed.
 2022-01-18 11:05:09 +00:00
Jonathan Woodruff
1f8181d595 Move to (recently merged) non-pipelined Divide. 2022-01-13 11:14:20 +00:00
Jonathan Woodruff
37f6dbde93 Timing optimisation for Tournament Predictor. 
Start global-history-indexed lookups in the previous cycle.
This is a general timing optimisation that should be pushed upstream at
some point.
 2022-01-12 16:08:33 +00:00
Jonathan Woodruff
e600fd7d38 Delay BTB update by a cycle for timing. 
This should not be a primary degredation of performance since the
redirection gets on seperately from this update which will only affect
future predictions.
 2022-01-08 10:16:50 +00:00
Jonathan Woodruff
b84562a027 Improve scheduling for LatencyTimer to improve timing path discovered on 
DE10.
 2022-01-07 09:52:43 +00:00
Jonathan Woodruff
f619f4b0a1 Make the associative BTB compressed. 
That is, only store the bottom 16 bits of the target if the upper bits
of pc and nextPc match.
Have a single "way" dedicated to full targets.
 2021-12-20 17:24:55 +00:00
Jonathan Woodruff
54d1a204f0 Don't decode redirected streams until they are non-speculative. 2021-12-17 16:29:14 +00:00
Jonathan Woodruff
4cc86b1e56 Revert more changes to buffer speculative training, as previous 
buffering of training from execute should be sufficient for the BTB as
well.
 2021-12-16 15:01:46 +00:00
Jonathan Woodruff
3322d1d3d7 Revert "An attempt at wiring up the specUpdate interface for the Btb." 
This reverts commit 022df36199.
 2021-12-16 12:10:50 +00:00
Jonathan Woodruff
022df36199 An attempt at wiring up the specUpdate interface for the Btb. 2021-12-15 18:40:58 +00:00
Jonathan Woodruff
696f546ecb Version using searchableSpecFifo in BTB with actual searching, but 
without killing speculative elements yet. This one is full performance
in CoreMark.
 2021-12-15 18:27:45 +00:00
Jonathan Woodruff
657453a0a0 Two modules (that build) that should be helpful in delaying the commit 
of training data.
 2021-12-15 17:06:46 +00:00
Jonathan Woodruff
af69f2e5db Merge branch 'CHERI' into jdw57_prediction 2021-12-15 16:47:42 +00:00
Jonathan Woodruff
34c6ee1894 Specifically give priority to wrong_spec when they conflict. 
This appears to yield 10% performance improvement as our default setup
appears to choose a wrong priority.
 2021-12-03 12:36:40 +00:00
Franz Fuchs
37074525e1 removed unnecessary execute permissions for Decode.bsv, Exec.bsv, ProcTypes.bsv, ReorderBuffer.bsv, and AluExePipeline.bsv 2021-11-29 10:38:23 +00:00
Jonathan Woodruff
59836cc9e5 Hopefully optimise this function to have just one call to modifyOffset. 2021-11-26 11:07:12 +00:00
Jonathan Woodruff
ad149db5c0 Hopefully optimise this function to have just one call to modifyOffset. 2021-11-25 17:39:46 +00:00
Jonathan Woodruff
cc0114f645 Swap write priority, as suggested by Franz. 2021-11-16 15:40:01 +00:00
Jonathan Woodruff
7b472d4d3c Reduce area overhead by using an unguarded specfifo that does not have 
to be worst-case-sized, but can drop elements if it is full.
 2021-11-16 13:53:34 +00:00
Jonathan Woodruff
618dea1225 Feed head of RAS through to execute with training info to reset the head 
on a misprediction.
 2021-11-16 11:00:04 +00:00
Jonathan Woodruff
d56045effe Make the associative BTB compressed. 
That is, only store the bottom 16 bits of the target if the upper bits
of pc and nextPc match.
Have a single "way" dedicated to full targets.
 2021-11-15 11:50:57 +00:00
Marno
0f86f09b6a Updated copyright statement 2021-11-11 12:15:45 +00:00
Marno
6ae92f786b Checking tag and seal on rVal2 and checking type on rVal1 in a way that does not use undefined behavior. 2021-11-11 11:36:45 +00:00
Marno
4d1dc29f79 Added ccopytype_bypass 2021-11-10 11:53:26 +00:00
Jonathan Woodruff
04a5d82ff0 Go back to standard tournament predictor (which performs the best on 
CoreMark), though cleaning up slightly to use standard functions.
 2021-11-10 09:54:34 +00:00
Jonathan Woodruff
8379d77cc5 Don't use a synthesis barrier for Bht so that we don't have to add it to 
XML.  The direction predictor already has one anyway.
 2021-11-08 13:51:52 +00:00
Jonathan Woodruff
e342600cb5 Try the traditional Bht, as it seems like it might be less fiddly with 
speculative training.
 2021-11-08 12:34:07 +00:00
Jonathan Woodruff
6713505d12 Experiment with different Bht constants to see if these affect our 
benchmark.
 2021-11-05 18:52:40 +00:00
Jonathan Woodruff
d5e52a9ecb Revert to upstream direction predictors to reduce diffs and prepare for 
improvements that can be upstreamed.
Basically, only use addresses in these predictors rather than
capabilities, and just pass an address in from the FetchStage.
 2021-11-05 17:42:19 +00:00
Jonathan Woodruff
836ed5b143 Merge branch 'jdw57-jr-bsc-safety' into CHERI 2021-11-03 16:46:21 +00:00
Jonathan Woodruff
3908c5f955 A merge resolution not included in previous commit due to not saving file. 
Doh.
 2021-11-02 18:12:05 +00:00
Jonathan Woodruff
7437c0c5e7 Some cleanups. 2021-11-02 18:09:06 +00:00
Jessica Clarke
fb1a629e07 Decode: Fix capability width mode-dependent LR/SC 
All of St, Amo, Lr and Sc use the normal 3-bit encoding for the width;
rather than add Lr and Sc to the list, switch it just to exclude Ld as
the special case that's handled by the other half of the expression.

Previously LR.C and SC.C were decoded as LR.BU and SC.BU.
 2021-10-27 15:44:23 +01:00
Jonathan Woodruff
87785eb25c Don't translate invalid vaddrs in the DTLB. 2021-10-14 17:13:18 +00:00
Jonathan Woodruff
3636f6239a Use Matt's slightly cleaner version of the function. 2021-10-11 16:23:22 +00:00
Jonathan Woodruff
1b5a036c46 Two fixes: do a proper "all bits are the same" function, as well as 
prepare a capability target to pass back.
 2021-10-08 16:35:42 +00:00
Jonathan Woodruff
5d5bee3e08 Use an invalid virtual address when preventing prediction, and also 
detect invalid virtual addresses in the TLB and miss rather than proceed
with page walking.
 2021-10-08 11:00:11 +00:00
Jonathan Woodruff
81a12b89cb Move to NonPipelinedSquareRooter to hopefully fit more 
deterministically.
We're still waiting for a fixed NonPipelinedDivider.
 2021-10-07 16:28:57 +00:00
gameboo
9657339d87 "fix" non PERFORMANCE_MONITORING build 2021-09-29 18:09:06 +01:00
Franz Fuchs
b25d70a8cc performed corrections for CONTRACTS_VERIFY 2021-09-07 08:15:03 +01:00
Franz Fuchs
bc7eed67ab Did more cleaning up 2021-09-06 15:55:28 +01:00