Franz Fuchs
598ac6574e
Added working Konata support
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Konata: change M to F3
Added konata support to ALU pipeline
Added KONATA support to Fpu pipeline
Added KONATA support to Mem pipeline
Finished v1 of KONATA support
Added improvements to catch fragments in Konata
Kill fragments that have been merged
Fixed order of konata logs
Added commit stage output
Ensured that only the Commit stage can retire instructions in konata
Fixed printing commit stage log for Cap instructions
Changed Kanata to include the cycle counter for each line in the log file; please note that this requires post processing
Added reservation station support for Konata
Added parsing script for Toooba output
Removed double updated to D stage
Adressed Peter's comments
2024-04-15 16:59:53 +01:00
Franz Fuchs
449070e347
Copied over preliminary Konata support from 89b0c37a7b
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The referenced commit did not merge well with our code base. Therefore, I copied over the changes manually. These changes do
not constitute a working Konata support for Toooba. In this commit, I commented out some things that did not compile, which will be fixed in future
2024-04-15 16:57:20 +01:00
Peter Rugg
4acbe2f43b
Fix build error with SPEC contracts
2023-07-17 17:38:57 +01:00
Peter Rugg
373b849d29
Merge branch 'tag-clear' into CHERI
2023-06-27 11:38:42 +01:00
Peter Rugg
ec4eacac9c
Fix CSetAddr tag clear bug
2023-06-26 18:01:56 +01:00
Peter Rugg
86782f9bb5
Cleanup unused exception code
2023-06-20 16:46:39 +01:00
Peter Rugg
c8b0e12f79
Remove traps for CBuildCap
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This will be very expensive in terms of area and possibly timing.
Ideally this instruction would be multi-cycle or optimised to reduce the overhead.
2023-06-20 16:23:44 +01:00
Peter Rugg
f3ac024b73
Remove exceptions from CUnseal
2023-06-20 12:32:49 +01:00
Peter Rugg
ca711eab2a
Remove exceptions from CToPtr and CFromPtr
2023-06-20 09:45:48 +01:00
gameboo
e6a8111a1b
Fix forgotten type change from tuple2 to tuple3 in mem exe pipeline
2023-06-14 11:49:09 +01:00
Jonathan Woodruff
f476990c65
Merge branch 'CHERI' into ks980-prefetch
2023-05-17 15:32:40 +00:00
Karlis Susters
5733ed9ac0
Implemented overflow bypass fifo, required for double target table
2023-04-12 21:58:35 +03:00
Karlis Susters
30a3aff5af
Config for L1D Stride-3 prefetcher
2023-03-07 12:33:51 +00:00
Peter Rugg
2047a85b27
Fixes for the simplified debug unit DMA port
2023-02-28 14:55:20 +00:00
Jonathan Woodruff
f255193841
Vastly simplified DMA Connect that does not buffer data at all.
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This has not been tested yet, but it builds.
2023-02-28 13:28:29 +00:00
Jonathan Woodruff
a91f15d10c
Merge branch 'CHERI' into jdw57-512axi
2023-02-21 12:18:02 +00:00
Peter Rugg
e981b7625f
Ban illegal JALR and Br encodings
2023-02-16 16:41:39 +00:00
Karlis Susters
79c55c5651
Implemented cross cache prefetching, fixed some coherence bugs in LLC
2023-02-13 11:59:26 +00:00
Karlis Susters
347107b733
Prefetcher implementation in both L1 and LL and data logging
2023-02-13 11:59:26 +00:00
Peter Rugg
8ea0e07ce5
Avoid wedge on repeated debug resumes (with jdw57 and aj443)
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ConfigReg avoids a compile error
2023-02-10 18:12:08 +00:00
Peter Rugg
6931201a14
Avoid wedge on repeated debug resumes (with jdw57 and aj443)
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ConfigReg avoids a compile error
2023-01-31 21:02:17 +00:00
Peter Rugg
9f24a516e6
Remove traps from CSeal and CCSeal
2023-01-16 10:43:32 +00:00
Peter Rugg
ecdc2e0107
Remove remaining unsealed checks
2023-01-11 17:50:37 +00:00
Peter Rugg
4c166c95b9
Change treatment of reserved types in CCopyType
2023-01-11 17:40:51 +00:00
Alexandre Joannou
98e15acb3d
Bump BlueStuff + use _Periph versions of parameters where needed
2022-11-18 12:07:24 +00:00
Jonathan Woodruff
4af4b647b1
Merge branch 'CHERI' into jdw57-512axi
2022-11-14 14:51:54 +00:00
Peter Rugg
e120b3427d
Merge branch 'LoadTagsImprove' into CHERI
2022-11-14 13:28:44 +00:00
Jonathan Woodruff
ddf4afaf71
Changes to build with a 512-bit main data bus (with all other busses
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still 64-bits).
Also, the top-level SoC_Top exposes a 64-bit bus still, so hopefully the
GFE configuration is unchanged.
This passes the isa_tests.
2022-11-11 17:52:32 +00:00
Peter Rugg
de0c0315f4
Remove trap conditions for CCopyType
2022-10-25 22:11:58 +01:00
Peter Rugg
b0233a01c4
Remove trap on CSetBounds*
2022-10-25 22:03:31 +01:00
Franz Fuchs
de0e19ca55
added do not cares for missing struct fields in ROB
2022-10-21 09:22:31 +00:00
Peter Rugg
2b471b0196
Don't require permit_x when constructing sentries
2022-10-18 15:51:52 +01:00
Peter Rugg
04ba0cb7ab
Prefer tag clearing to trapping when manipulating a sealed capability
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This causes the behaviour of CCSeal and CSeal to diverge in non-trapping cases,
meaning an extra case is added to CapModify.
2022-10-18 15:48:35 +01:00
Alexandre Joannou
d068df3bd8
uncomment a verbosity check
2022-09-02 12:37:07 +00:00
Jonathan Woodruff
1fceb8fa72
Use standard imports as the fixes have been upstreamed.
2022-08-15 16:18:23 +00:00
Alexandre Joannou
947cf8ed7b
NonPipelined API update
2022-08-15 16:18:23 +00:00
Alexandre Joannou
e4bdbfc98a
Bump BlueStuff + add outter subordinate trafic as master to internal bus
2022-08-15 16:18:23 +00:00
Alexandre Joannou
a954fd5b38
Use NonPipelined dividers + update "reset_by" in CoreW
2022-08-15 16:18:23 +00:00
gameboo
45135a0bee
Don't assume a XILINX tool flow
2022-08-15 16:18:23 +00:00
Jonathan Woodruff
8cb96bae5c
Fixes for load address tracing.
2022-08-12 15:09:01 +00:00
Franz Fuchs
2f595167a4
commented out debug print statements in Ras.bsv
2022-07-29 15:41:28 +01:00
Franz Fuchs
e89af4a66d
added typedefs to STLPred
2022-07-26 09:18:20 +01:00
Franz Fuchs
d3e8ef8d90
removed unnecessary declarations in RenameStage
2022-07-25 13:18:50 +01:00
Jonathan Woodruff
a1065616e0
Fix tracing of writes to MMIO addresses.
2022-07-22 15:37:25 +00:00
Franz Fuchs
4abf838d62
implemented missing notFull method in SpecFifo
2022-07-11 14:56:30 +01:00
Franz Fuchs
ad9f2cab3d
used RVFI defines as declared in ToReorderBuffer
2022-07-11 14:18:19 +01:00
Alexandre Joannou
9960d67ed8
Removed some debug print statements
2022-07-11 11:55:40 +00:00
Franz Fuchs
c85b13c5af
added MELTDOWN_CF ifdef and enabled it
2022-06-30 12:55:53 +01:00
Peter Rugg
fb259583dc
Attempt to clear tag on exception path before forwarding.
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This is likely to be bad for timing, but might just work at 25MHz.
2022-06-15 00:53:55 +01:00
Franz Fuchs
f8b97ceb6a
corrected ifdef in STLPred.bsv
2022-06-09 15:24:10 +01:00