Commit Graph

674 Commits

Author SHA1 Message Date
Jonathan Woodruff
32d094082b Some tracing for performance in the memory pipeline.
Also, add some ports to registers in DTLB to potentially allow
single-cycle lookup.
2024-01-08 15:28:24 +00:00
Jonathan Woodruff
2d05514b66 An experimental simplification of the SplitLSQ, which I think works
because the Memory pipeline only ever reads the getIssueLd interface in
the same rule that it calls issueLd.
2023-12-12 17:29:27 +00:00
Peter Rugg
4acbe2f43b Fix build error with SPEC contracts 2023-07-17 17:38:57 +01:00
gameboo
561683343d Add a mean to configure starting PC dynamically at start of simulation 2023-07-13 15:34:08 +01:00
Peter Rugg
373b849d29 Merge branch 'tag-clear' into CHERI 2023-06-27 11:38:42 +01:00
Peter Rugg
ec4eacac9c Fix CSetAddr tag clear bug 2023-06-26 18:01:56 +01:00
Jonathan Woodruff
3ebf537f71 Tidy up tracing options, including using RVFI when building for bluesim
(which I'm sure we had meant to be doing?).
2023-06-23 13:09:38 +00:00
Peter Rugg
86782f9bb5 Cleanup unused exception code 2023-06-20 16:46:39 +01:00
Peter Rugg
c8b0e12f79 Remove traps for CBuildCap
This will be very expensive in terms of area and possibly timing.
Ideally this instruction would be multi-cycle or optimised to reduce the overhead.
2023-06-20 16:23:44 +01:00
Peter Rugg
f3ac024b73 Remove exceptions from CUnseal 2023-06-20 12:32:49 +01:00
Peter Rugg
ca711eab2a Remove exceptions from CToPtr and CFromPtr 2023-06-20 09:45:48 +01:00
gameboo
e6a8111a1b Fix forgotten type change from tuple2 to tuple3 in mem exe pipeline 2023-06-14 11:49:09 +01:00
Jonathan Woodruff
318c94ec41 Merge branch 'ks980-prefetch' into CHERI 2023-05-23 17:35:58 +00:00
Jonathan Woodruff
410be14a25 Merge remote-tracking branch 'karlis/CHERI' into ks980-prefetch 2023-05-23 17:34:19 +00:00
Karlis Susters
373d92c17a Added license text 2023-05-23 13:37:43 +01:00
Jonathan Woodruff
1e7f19e7f0 Merge branch 'ks980-prefetch' into CHERI 2023-05-22 16:14:51 +00:00
Karlis Susters
35524a2a50 Revert L1 store counters to tracking stores 2023-05-18 13:34:39 +01:00
gameboo
afba99d0a1 Added missing DefaultValue import 2023-05-17 17:50:05 +01:00
Jonathan Woodruff
f476990c65 Merge branch 'CHERI' into ks980-prefetch 2023-05-17 15:32:40 +00:00
Karlis Susters
2ae2b99268 Move Prefetcher unit tests to unit test folder 2023-05-11 00:10:32 +01:00
Karlis Susters
3098b8afba Other code cleanup 2023-05-10 23:59:35 +01:00
Karlis Susters
1776ba3317 Prefetcher code cleanup 2023-05-10 23:55:05 +01:00
Karlis Susters
05e5ad5076 Update tests for singlewindow-target 2023-05-10 23:51:16 +01:00
Karlis Susters
0554fad990 Config for L1D MarkovDouble 2023-04-25 13:05:01 +01:00
Karlis Susters
88fee870d0 Minor update to single-window-target 2023-04-22 10:00:50 +01:00
Karlis Susters
3953581b50 Fix stride prefetcher mis-commit 2023-04-22 10:00:15 +01:00
Karlis Susters
754627d4e8 Stride: block prefetches out of page bounds, and reduce stride bit length 2023-04-21 16:05:10 +01:00
Karlis Susters
b5a3a78e58 Minor change to multi window prefetcher design 2023-04-20 17:05:59 +01:00
Karlis Susters
4bc04b581d Config for L1I MultiWindowTarget-2 2023-04-19 14:22:01 +03:00
Karlis Susters
cc65297cf9 simplified simple stride slightly 2023-04-15 15:49:34 +03:00
Karlis Susters
8e3d6409c0 Simplified Stride2 code, using Int type 2023-04-15 15:37:59 +03:00
Karlis Susters
2f428a974a Reduce bit storage for stride prefetcher 2023-04-13 18:27:28 +03:00
Karlis Susters
2ec0f37bbd Remove stride prefetcher empty state 2023-04-13 13:39:22 +03:00
Karlis Susters
0e4b9a710a Implemented SimpleStride, to compare with Gem5 2023-04-12 23:31:15 +03:00
Karlis Susters
5733ed9ac0 Implemented overflow bypass fifo, required for double target table 2023-04-12 21:58:35 +03:00
Karlis Susters
f20e80e5b2 Tests for prefetchervector, double target table, overflow bypass fifo 2023-04-12 21:57:03 +03:00
Karlis Susters
d2b41c852d Added prefetcher port to ICrqmshr and retired prefetchRqDone 2023-04-12 21:55:13 +03:00
Karlis Susters
bf0f26ce56 Implemented double target table and the corresponding markov prefetcher 2023-04-12 21:52:56 +03:00
Karlis Susters
2d94cba951 Implemented vector prefetcher setup in L2 2023-04-12 21:50:31 +03:00
Karlis Susters
4ea9b17971 Minor changes to targettable and instruction target prefetchers 2023-04-12 21:31:08 +03:00
Karlis Susters
1ad1dfad6a Config for MarkovOnHit-2-8KiB. 2023-03-30 13:07:34 +01:00
Karlis Susters
625dbb3066 Count sent prefetch requests as Store misses, cache full cycles as stores 2023-03-30 13:06:12 +01:00
Karlis Susters
06651f1a31 Actually repurpose L1D store count, not store miss count 2023-03-24 15:15:03 +00:00
Karlis Susters
7d7d38ad49 Repurpose L1D store miss count to track number of cycles cache is full 2023-03-24 15:11:08 +00:00
Karlis Susters
a4ad28d865 Config for MarkovOnHit-1-bigtable 2023-03-23 11:09:36 +00:00
Karlis Susters
643afd81e2 Implementation and config for L1D StrideV2-2 prefetcher 2023-03-22 22:12:59 +00:00
Karlis Susters
808d961a7b Implementation and config for L1D MarkovOnHit-2-BigTable 2023-03-21 19:26:38 +00:00
Karlis Susters
1123f43423 Config for L1D Markov-2-Bigtable 2023-03-20 13:04:21 +00:00
Karlis Susters
e584786c93 Bugfix to Stride Adaptive config 2023-03-17 11:26:23 +00:00
Karlis Susters
cef4990ce3 Implement adaptive stride prefetcher, update prefetcher tests 2023-03-17 10:58:54 +00:00