Commit Graph

426 Commits

Author SHA1 Message Date
Franz Fuchs
2831cd7ee3 Changed size of bags for testing SBC to 32 2021-07-16 14:51:26 +01:00
Franz Fuchs
483cef8852 Removed unnecessary display statements 2021-07-12 14:55:07 +02:00
Franz Fuchs
7b1b564d62 Added missing ifdef 2021-07-12 13:30:53 +01:00
Franz Fuchs
c37c611522 Merge branch 'CHERI' into faf28_sbc_jumps 2021-07-08 17:14:27 +01:00
Franz Fuchs
224ab35679 Completed introduction of new build flag 2021-07-08 15:38:19 +01:00
Franz Fuchs
4ba377366a Introduced new build flag for transient-execution testing contracts 2021-07-08 15:28:54 +01:00
jon
849d5c57f8 Fix condition where Queue can remain "empty" when there were outstanding
indices due to the head-1 element happening to match new requests.
This leads to "remove" when empty, leading to being "almostFull" when
there are no outstanding users that will remove anything.
2021-07-07 11:34:29 +01:00
jon
994321e527 Potential fix for lockup condition where the (undefined) bits of
instruction returned for an invalid fetch (that is, with a valid cause)
indicate a 2-fragment instruction but where a second fragment is not
available.
2021-07-07 11:34:29 +01:00
Franz Fuchs
db6a91e0fd mad Maps flush on reset 2021-07-06 15:19:37 +01:00
Franz Fuchs
2eb2202acd Added checking for wild exceptions in MemExePipeline including adding an addtional port to the ROB for reading ppc/orig_inst 2021-06-28 07:34:57 +01:00
jon
b48a161fda Experimentally remove repeated write of rg_m_halt_req register. 2021-06-25 17:31:10 +01:00
Franz Fuchs
fec16f64c8 Added first attempts for counting wild exceptions 2021-06-25 15:44:29 +01:00
Franz Fuchs
f83d7b1554 Added missing ifdefs 2021-06-24 08:35:21 +01:00
Franz Fuchs
0c80ac30bb Corrected wild jumps type to SupCnt 2021-06-23 15:36:45 +01:00
Franz Fuchs
c9df8da1b1 Corrected SBC counting 2021-06-23 12:47:34 +01:00
Franz Fuchs
23913a50e0 Improved code for detecting SBC violations 2021-06-23 08:00:42 +01:00
Franz Fuchs
76cdc13a50 Added counting code for return instructions 2021-06-22 18:01:32 +01:00
Franz Fuchs
8f45238b5d implemented method returning the trans exe events 2021-06-22 08:49:40 +01:00
Franz Fuchs
06e0a3d810 corrected SBC jumps counting 2021-06-22 08:40:27 +01:00
Peter Rugg
4a50ae5bc8 Fix some misplaced ifdefs 2021-06-14 15:13:35 +01:00
Franz Fuchs
a60bed404a Added new counting for branching instructions 2021-06-11 17:09:21 +01:00
Franz Fuchs
dce934500d Added counter mechanism for wild jumps 2021-06-11 10:47:15 +01:00
Franz Fuchs
c51af07278 Collect all architectural jump targets (the first 16) in a bag to enable verifying properties 2021-06-10 18:55:00 +01:00
Franz Fuchs
2572fdceba Added documentation for rename counter and removed unnecessary display messages 2021-06-08 15:03:12 +01:00
Franz Fuchs
914eb17550 Added microarchitectural counter for renamed instructions
This counter is used for the SBC Condition 1 verification
2021-06-08 13:18:57 +01:00
jon
4ae9f5346c Merge branch 'CHERI' of https://github.com/CTSRD-CHERI/Toooba into CHERI 2021-06-01 15:18:29 +01:00
jon
d7a492b48f Move to Flute standard placement for Tag Cache events, which is just the
raw order from the CacheCore events.
2021-06-01 15:17:25 +01:00
Peter Rugg
10f0807a9b Fix arbitration for non-power-of-two numbers of sources 2021-05-28 14:37:24 +01:00
Peter Rugg
bf911326e3 Fix some arbitration bugs 2021-05-28 12:36:06 +01:00
Jessica Clarke
46b1519cb0 mkXBar: Simplify as fallback case handles priority case correctly
The first element in the vector will be srcRR[dst], so the special case
is unnecessary.
2021-05-28 02:57:12 +01:00
Jessica Clarke
afd636a0f5 mkXBar: Fix bias towards earlier sources
In the case where the prioritised round-robin source does not have a
request, this was always picking the earliest source that had one, which
means if some sources are making more requests than others (e.g. there
is lots of D$ churn but the I$ has a high hit rate) then, whilst the
cycles where srcRR[dst] prioritises a source that is making requests are
fair, the cycles where it prioritises a source that is not making
requests is not fair, since then the earlier sources will be
prioritised. Instead, make the fallback priority similarly dynamic so we
cycle through the order we look at the sources in.
2021-05-28 02:32:04 +01:00
Peter Rugg
f909d886c9 Add a copyright 2021-05-27 14:45:15 +01:00
Peter Rugg
1b5f4ee9e0 Add capability-aware compressed decoding 2021-05-26 16:25:55 +01:00
Peter Rugg
88751cccba Remove hardcoded field encodings for cap loads and stores 2021-05-26 16:25:55 +01:00
Peter Rugg
913d14406e Add explicit PCC and cap JALRs 2021-05-26 16:24:41 +01:00
Peter Rugg
6450d9c33c Make JAL and JALR mode-dependent 2021-05-26 16:24:41 +01:00
Peter Rugg
657124671c Support amoswap.c 2021-05-13 23:15:25 +01:00
Peter Rugg
abc70134b1 Don't take load cap page faults if the authorising cap doesn't have load cap 2021-05-13 23:15:25 +01:00
Franz Fuchs
d78a2799d3 Fixed small mistake pointed out by Peter(pdr32) 2021-05-12 10:46:07 +01:00
Franz Fuchs
fcea3a1f4e included suggestions from Peter (pdr32) 2021-05-11 19:28:49 +01:00
Franz Fuchs
f6bd0b0e1b first attempts to fix inhibit mismatch 2021-05-11 14:13:02 +01:00
Peter Rugg
0a7e77230e Style improvements (suggested by jrtc27) 2021-05-05 13:32:07 +01:00
Peter Rugg
7e77b2314b Clarify precedence in VM permission check 2021-05-05 13:32:07 +01:00
Peter Rugg
e7258f0f22 Plumb through info on whether a load is capWidth to the TLB 2021-05-05 13:32:07 +01:00
jon
b8d86df2d0 Guard Meltdown_CF protection (such as it is) with ifdef rather than just
comment it out.
2021-05-04 11:29:36 +01:00
jon
2dccf1b557 Add (not-enabled-by-defaul) Meltdown-CF fix which resolves CUnseal, but not any
of the ones that require a bounds-check.
This isn't enabled by default so that we can evaluate the seriousness of
the vulnerabilities.
2021-04-29 17:46:39 +01:00
Peter Rugg
48e22af43e Factor out PTE cap invalid check 2021-04-29 16:02:30 +01:00
Peter Rugg
005ba1bd6f Add LoadCapPageFault exception cases 2021-04-29 16:02:30 +01:00
Peter Rugg
1eef5d2979 Still advance the DII stream on instruction fetch PTE fault (with jrtc27) 2021-04-29 16:02:30 +01:00
Peter Rugg
3b07a2a17c Add revocation 3.0 bits 2021-04-29 16:02:30 +01:00