Karlis Susters
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ada7d133e4
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Config for L1D Stride-4 prefetcher
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2023-03-13 14:51:59 +00:00 |
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gameboo
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7ebe04af74
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Bump BlueStuff
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2023-03-11 09:10:12 +00:00 |
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gameboo
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08b43033e7
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Bump BlueStuff
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2023-03-09 16:43:52 +00:00 |
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Karlis Susters
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54b9f6669e
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Bugfix for L1LL D prefetchers, config for L1LL D Stride-3
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2023-03-08 13:37:04 +00:00 |
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Jonathan Woodruff
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5dfedf5b4c
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Don't build with BSC protection by default.
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2023-03-08 11:30:33 +00:00 |
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Karlis Susters
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30a3aff5af
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Config for L1D Stride-3 prefetcher
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2023-03-07 12:33:51 +00:00 |
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gameboo
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c504702019
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Bump BlueStuff
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2023-03-06 17:33:55 +00:00 |
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Karlis Susters
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76c0071c9e
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Config for L1LL D Block-1 prefetcher
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2023-03-03 14:23:13 +00:00 |
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Peter Rugg
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2e2eb0a31d
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Bump BlueStuff
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2023-03-02 21:20:27 +00:00 |
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Peter Rugg
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0a3f8b881c
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Bump BlueStuff
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2023-03-02 17:21:16 +00:00 |
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Karlis Susters
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a52a36e199
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Push config for L1LL I Single window-2 prefetcher
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2023-03-02 15:42:37 +00:00 |
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Karlis Susters
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1d2affc707
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Set up config for L1I single window-2 prefetcher
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2023-03-01 17:20:19 +00:00 |
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Peter Rugg
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eb755801eb
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Revert "Revert "Use wide to narrow AXI4 shim""
This reverts commit 93180fbe25.
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2023-03-01 14:38:13 +00:00 |
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Jonathan Woodruff
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43257bf4dc
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Bump tag controller.
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2023-03-01 13:41:01 +00:00 |
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Peter Rugg
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ece8955595
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Prevent reads to addresses with outstanding writes
Untested
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2023-02-28 23:02:44 +00:00 |
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Peter Rugg
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2047a85b27
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Fixes for the simplified debug unit DMA port
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2023-02-28 14:55:20 +00:00 |
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Jonathan Woodruff
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f255193841
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Vastly simplified DMA Connect that does not buffer data at all.
This has not been tested yet, but it builds.
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2023-02-28 13:28:29 +00:00 |
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Jonathan Woodruff
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a38610869d
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Merge branch 'jdw57-512axi' of https://github.com/CTSRD-CHERI/Toooba into jdw57-512axi
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2023-02-28 13:27:10 +00:00 |
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Karlis Susters
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6509cf6445
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Changed config to L1D Block-1 prefetcher and fixed potential bug
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2023-02-28 12:29:38 +00:00 |
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Karlis Susters
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7a352d774e
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Set up config for an L2 next-2-line-on-miss instruction prefetcher
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2023-02-24 11:43:29 +00:00 |
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gameboo
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4187f8be5b
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Bump BlueStuff
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2023-02-23 14:51:54 +00:00 |
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gameboo
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aa68739ab6
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Update imports in CoreW
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2023-02-23 14:51:24 +00:00 |
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Karlis Susters
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5cb283a5d5
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Set up config for L1D block prefetcher
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2023-02-23 10:30:47 +00:00 |
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Karlis Susters
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e228854d9f
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Change config to next-1-line L1I prefetcher
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2023-02-22 17:08:48 +00:00 |
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Jonathan Woodruff
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a91f15d10c
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Merge branch 'CHERI' into jdw57-512axi
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2023-02-21 12:18:02 +00:00 |
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Karlis Susters
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87a88a749b
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Set up config for next-2-lines on miss L1I prefetcher
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2023-02-21 10:45:56 +00:00 |
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gameboo
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974171db01
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Bump BlueStuff
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2023-02-20 21:34:17 +00:00 |
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Karlis Susters
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42777725bf
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Random update change
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2023-02-20 15:47:24 +00:00 |
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Karlis Susters
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bd2ceec15f
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L1D prefetch into S, not M
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2023-02-20 11:17:59 +00:00 |
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Karlis Susters
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9ac29f4e11
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Enable only L1D block prefetcher
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2023-02-20 11:03:49 +00:00 |
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Peter Rugg
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93180fbe25
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Revert "Use wide to narrow AXI4 shim"
This reverts commit be91801982.
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2023-02-17 11:16:20 +00:00 |
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Peter Rugg
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e981b7625f
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Ban illegal JALR and Br encodings
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2023-02-16 16:41:39 +00:00 |
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Karlis Susters
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56035b1ce4
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Changed prefetcher configuration
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2023-02-16 14:01:50 +00:00 |
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Peter Rugg
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ba1ac6892a
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Bump BlueStuff
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2023-02-16 12:22:05 +00:00 |
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Peter Rugg
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a7c2a556c8
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Bump BlueStuff
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2023-02-15 16:15:07 +00:00 |
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Karlis Susters
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7ac5ed5efd
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Change config to simpler one
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2023-02-14 16:47:06 +00:00 |
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Karlis Susters
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2c9428d1f3
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Prepared repo for building on FPGA
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2023-02-13 21:52:50 +00:00 |
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Karlis Susters
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9d027a3f4b
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Implemented BRAM versions of stride, target, markov prefetchers
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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31ae938e78
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Implemented a stride prefetcher with BRAM instead of vectors
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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79c55c5651
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Implemented cross cache prefetching, fixed some coherence bugs in LLC
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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dca4b980c5
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Implemented a markov chain data prefetcher
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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9f733eddf1
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Merged reportHit & reportMiss, changed compile time parameter passing
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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06e648df6a
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Implemented target table module, refactored single and multi window instruction prefetchers to use it
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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7c05ebbd90
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Implemented multi line target prefetcher
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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e602d4780e
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LLC prefetcher fixes and single window target prefetcher implementation
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2023-02-13 11:59:26 +00:00 |
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Karlis Susters
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347107b733
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Prefetcher implementation in both L1 and LL and data logging
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2023-02-13 11:59:26 +00:00 |
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Peter Rugg
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5f5e391e32
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Connect ndm reset up in src_SSITH_P3 build
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2023-02-10 18:12:33 +00:00 |
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Peter Rugg
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8ea0e07ce5
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Avoid wedge on repeated debug resumes (with jdw57 and aj443)
ConfigReg avoids a compile error
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2023-02-10 18:12:08 +00:00 |
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Peter Rugg
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69b96cc68f
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Extend the final missed id width
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2023-02-10 17:09:20 +00:00 |
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Peter Rugg
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b0316afcb7
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Extend missed id field width
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2023-02-10 17:01:32 +00:00 |
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