Franz Fuchs
4c9d89e936
Performed a bit of cleaning up
2021-09-06 13:33:13 +01:00
Franz Fuchs
0d42b6075a
Bump new HPM Events submodule
2021-09-06 13:10:38 +01:00
Franz Fuchs
e4b4becea4
Added HPM Events submodule
2021-09-06 13:03:18 +01:00
Franz Fuchs
83172e612c
Added makefile support for HPM events files
2021-09-06 12:44:29 +01:00
Franz Fuchs
e33b4021d8
Integrated generateHPMVector function
2021-09-03 17:37:43 +01:00
Franz Fuchs
61d788ebc7
define No_Of_Evts in StatCounters
2021-09-03 14:14:32 +01:00
Franz Fuchs
d36a129bf9
Bump TagController
2021-09-03 08:12:33 +01:00
Franz Fuchs
20e67971a5
Use type EventsCacheCore instead of Vector#(7, Bit#(1))
2021-09-02 16:10:55 +01:00
Franz Fuchs
b490cbb414
Bump TagController
2021-09-02 15:01:10 +01:00
Franz Fuchs
9f615e4481
initial changes for HPM consistency
2021-09-02 14:50:17 +01:00
Robert Norton
0970951184
Fix decoding of lr / sc with explicit bounds.
...
When decoding {lr,sc}.{b,h,w,d,c,q}.{ddc,cap} the IType was not being set correctly. For sc we also need to set the destination register.
2021-09-01 10:16:49 +01:00
Peter Rugg
dbb6043760
Don't compile SelfInv* without define
2021-08-16 14:42:59 +01:00
Robert Norton
7e2a946c4c
Fix incorrect check for permitStoreLocalCap in capChecksMem.
...
The check was missing a NOT and was actually checking for permitStoreGlobalCap.
2021-08-05 12:19:50 +01:00
Robert Norton
5b23f4cea0
Fix incorrect checks in capChecksMem.
...
These checks were broken in several ways:
1) a missing 'else' inverted the priority of PermitStoreViolation vs. PermitStore[Local]Cap exceptions
2) another missing 'else' inverted the priority of PermitStoreCap and PermitStoreLocalCap exceptions
3) No store checks were performed when mem_func == Amo because of the preceding if clause for loads
I decided to flatten the nested if statements by pulling out the conditions into boolean local variables. Hopefully this makes it clearer (as well as fixing the bugs).
2021-08-05 09:33:52 +01:00
Robert Norton
b811cdb967
Remove unnecessary bzero in elf_to_hex.
...
This was causing excessive physical memory usage when running tests in parallel resulting in out-of-memory killer being invoked.
2021-08-02 15:54:29 +01:00
Robert Norton
ff0221f6bc
Fix CHERI Exception numbering to match spec.
...
It looks like PermitUnsealViolation and PermitSetCIDViolation were accidentally renumbered to fill in the gap left by the retired CCallAcessIDCViolation.
2021-08-02 12:15:05 +01:00
Robert Norton
a07e0d32f5
Improve error handling in Run_regression.py
...
1) Check the return code of subprocesses.
2) Add a 60s timeout to detect non-termination.
3) Don't run simulator if elf_to_hex fails.
4) Include return codes in log.
2021-08-02 12:09:49 +01:00
Franz Fuchs
cc25ee69d3
Check in Rename stage for nextPcs of Traps
2021-07-26 07:02:21 +01:00
Franz Fuchs
2831cd7ee3
Changed size of bags for testing SBC to 32
2021-07-16 14:51:26 +01:00
Peter Rugg
ae4a16cd6b
Fix build issues for RVFI_DII simulators
2021-07-13 14:52:08 +01:00
Peter Rugg
cb4b67ff7d
Enable TSO_MM for simulations
2021-07-12 15:50:54 +01:00
Peter Rugg
a8c4ce073d
Factor out bsc flags to include_common
2021-07-12 15:50:54 +01:00
Franz Fuchs
483cef8852
Removed unnecessary display statements
2021-07-12 14:55:07 +02:00
Franz Fuchs
7b1b564d62
Added missing ifdef
2021-07-12 13:30:53 +01:00
Franz Fuchs
c37c611522
Merge branch 'CHERI' into faf28_sbc_jumps
2021-07-08 17:14:27 +01:00
Franz Fuchs
224ab35679
Completed introduction of new build flag
2021-07-08 15:38:19 +01:00
Franz Fuchs
4ba377366a
Introduced new build flag for transient-execution testing contracts
2021-07-08 15:28:54 +01:00
jon
849d5c57f8
Fix condition where Queue can remain "empty" when there were outstanding
...
indices due to the head-1 element happening to match new requests.
This leads to "remove" when empty, leading to being "almostFull" when
there are no outstanding users that will remove anything.
2021-07-07 11:34:29 +01:00
jon
994321e527
Potential fix for lockup condition where the (undefined) bits of
...
instruction returned for an invalid fetch (that is, with a valid cause)
indicate a 2-fragment instruction but where a second fragment is not
available.
2021-07-07 11:34:29 +01:00
Franz Fuchs
db6a91e0fd
mad Maps flush on reset
2021-07-06 15:19:37 +01:00
Franz Fuchs
2eb2202acd
Added checking for wild exceptions in MemExePipeline including adding an addtional port to the ROB for reading ppc/orig_inst
2021-06-28 07:34:57 +01:00
jon
b48a161fda
Experimentally remove repeated write of rg_m_halt_req register.
2021-06-25 17:31:10 +01:00
Franz Fuchs
fec16f64c8
Added first attempts for counting wild exceptions
2021-06-25 15:44:29 +01:00
Franz Fuchs
f83d7b1554
Added missing ifdefs
2021-06-24 08:35:21 +01:00
Franz Fuchs
0c80ac30bb
Corrected wild jumps type to SupCnt
2021-06-23 15:36:45 +01:00
Franz Fuchs
c9df8da1b1
Corrected SBC counting
2021-06-23 12:47:34 +01:00
Franz Fuchs
23913a50e0
Improved code for detecting SBC violations
2021-06-23 08:00:42 +01:00
Franz Fuchs
76cdc13a50
Added counting code for return instructions
2021-06-22 18:01:32 +01:00
Franz Fuchs
8f45238b5d
implemented method returning the trans exe events
2021-06-22 08:49:40 +01:00
Franz Fuchs
06e0a3d810
corrected SBC jumps counting
2021-06-22 08:40:27 +01:00
Peter Rugg
4a50ae5bc8
Fix some misplaced ifdefs
2021-06-14 15:13:35 +01:00
Franz Fuchs
a60bed404a
Added new counting for branching instructions
2021-06-11 17:09:21 +01:00
Franz Fuchs
dce934500d
Added counter mechanism for wild jumps
2021-06-11 10:47:15 +01:00
Franz Fuchs
c51af07278
Collect all architectural jump targets (the first 16) in a bag to enable verifying properties
2021-06-10 18:55:00 +01:00
Franz Fuchs
2572fdceba
Added documentation for rename counter and removed unnecessary display messages
2021-06-08 15:03:12 +01:00
Franz Fuchs
914eb17550
Added microarchitectural counter for renamed instructions
...
This counter is used for the SBC Condition 1 verification
2021-06-08 13:18:57 +01:00
Marno van der Maas
c1cdd9e5e1
Corrected tag controller events based on EventsCacheCore
2021-06-07 17:53:24 +01:00
Marno van der Maas
8bd8ee6310
Doc update for tag controller performance monitor addresses based on commit d7a492b48f
2021-06-07 17:37:13 +01:00
jon
4ae9f5346c
Merge branch 'CHERI' of https://github.com/CTSRD-CHERI/Toooba into CHERI
2021-06-01 15:18:29 +01:00
jon
d7a492b48f
Move to Flute standard placement for Tag Cache events, which is just the
...
raw order from the CacheCore events.
2021-06-01 15:17:25 +01:00
