Also, assume that a target that is not taken should be removed from the
Btb. (The read that checked isn't possible with BRAM timing unless we
latched and had an extra port, but removing the check actually improved
performance a bit in CoreMark, and the pipeline should actually only be
reporting a non-taken branch if we did something wrong.)
The mode and well-formedness checks above also set fault to True, so we
end up with cases where a DataStore request uses the default load page
fault exception code. Instead, unconditionally set excStorePageFault for
DataStore, and conditionally override to excStoreCapPageFault when
appropriate, being particularly careful to ensure earlier exception
causes still take precedence.
Also restructure the InstFetch and DataLoad cases to match how DataStore
needs to look.
This fixes the rv64si-p-dirty ISA test, currently the sole failure.
This one does not actually build with the new BSC compiler. I forgot to
test the hardware build (with GDB), which is where we have the problem.
This reverts commit b4308e9a6e.
Store the upper bits of the PC in a table and only handle indices and
lsbs in the main pipeline.
This eliminates redundancy between PCs and predicted PCs, and even more
between fragments of instructions.
Whilst the current PLIC spec is hard to decipher, the older v1.9
privileged spec is clearer. The intent is that each interrupt is
independent and so claims and completions can be overlapped (e.g. as
done by FreeBSD if deferring an interrupt handler). This is
approximately expressed in the spec by:
The PLIC can perform a claim at any time and the claim operation is
not affected by the setting of the priority threshold register.
...
The PLIC does not check whether the completion ID is the same as the
last claim ID for that target. If the completion ID does not match an
interrupt source that is currently enabled for the target, the
completion is silently ignored.
Thost last two sentences make it sound like the completion ID not
matching the last claim ID is a thing to ignore, but in fact they are
entirely independent statements. This can be confirmed by reading the
source for the Rocket and QEMU PLICs, which have none of the stricter
requirements of the Bluespec PLIC implementation.
This should fix running FreeBSD after r362977, which started to
correctly delay the completion of interrupts until after deferred
handlers had completed (as opposed to after they had been queued).
