Commit Graph

913 Commits

Author SHA1 Message Date
Jonathan Woodruff
abc99aaafc Merge remote-tracking branch 'karlis/CHERI' into ks980-prefetch 2023-03-21 11:37:07 +00:00
Karlis Susters
1123f43423 Config for L1D Markov-2-Bigtable 2023-03-20 13:04:21 +00:00
Karlis Susters
fe95337a97 Add STRIDE_ADAPTIVE to makefile 2023-03-20 11:41:03 +00:00
Jonathan Woodruff
edb66ca209 Add an option that's needed now to build with STRIDE_ADAPTIVE. 2023-03-20 10:03:47 +00:00
Karlis Susters
15b9243f9a Set up config for L1D StrideAdaptive prefetcher 2023-03-17 11:26:49 +00:00
Karlis Susters
e584786c93 Bugfix to Stride Adaptive config 2023-03-17 11:26:23 +00:00
Karlis Susters
cef4990ce3 Implement adaptive stride prefetcher, update prefetcher tests 2023-03-17 10:58:54 +00:00
Karlis Susters
65ed55cb8a Cleanup: remove non-BRAM prefetchers 2023-03-16 12:29:06 +00:00
Karlis Susters
9c4da78c34 Modifications and config for L1LL Markov-2 prefetcher 2023-03-16 11:55:27 +00:00
Karlis Susters
239e011adf Config for L1D Stride-2-BigTable 2023-03-15 16:30:35 +00:00
Karlis Susters
8617d38e80 Config for L1D Stride-2 prefetcher 2023-03-14 13:52:17 +00:00
Karlis Susters
ada7d133e4 Config for L1D Stride-4 prefetcher 2023-03-13 14:51:59 +00:00
Karlis Susters
54b9f6669e Bugfix for L1LL D prefetchers, config for L1LL D Stride-3 2023-03-08 13:37:04 +00:00
Karlis Susters
30a3aff5af Config for L1D Stride-3 prefetcher 2023-03-07 12:33:51 +00:00
Karlis Susters
76c0071c9e Config for L1LL D Block-1 prefetcher 2023-03-03 14:23:13 +00:00
Karlis Susters
a52a36e199 Push config for L1LL I Single window-2 prefetcher 2023-03-02 15:42:37 +00:00
Karlis Susters
1d2affc707 Set up config for L1I single window-2 prefetcher 2023-03-01 17:20:19 +00:00
Karlis Susters
6509cf6445 Changed config to L1D Block-1 prefetcher and fixed potential bug 2023-02-28 12:29:38 +00:00
Karlis Susters
7a352d774e Set up config for an L2 next-2-line-on-miss instruction prefetcher 2023-02-24 11:43:29 +00:00
Karlis Susters
5cb283a5d5 Set up config for L1D block prefetcher 2023-02-23 10:30:47 +00:00
Karlis Susters
e228854d9f Change config to next-1-line L1I prefetcher 2023-02-22 17:08:48 +00:00
Karlis Susters
87a88a749b Set up config for next-2-lines on miss L1I prefetcher 2023-02-21 10:45:56 +00:00
Karlis Susters
42777725bf Random update change 2023-02-20 15:47:24 +00:00
Karlis Susters
bd2ceec15f L1D prefetch into S, not M 2023-02-20 11:17:59 +00:00
Karlis Susters
9ac29f4e11 Enable only L1D block prefetcher 2023-02-20 11:03:49 +00:00
Karlis Susters
56035b1ce4 Changed prefetcher configuration 2023-02-16 14:01:50 +00:00
Karlis Susters
7ac5ed5efd Change config to simpler one 2023-02-14 16:47:06 +00:00
Karlis Susters
2c9428d1f3 Prepared repo for building on FPGA 2023-02-13 21:52:50 +00:00
Karlis Susters
9d027a3f4b Implemented BRAM versions of stride, target, markov prefetchers 2023-02-13 11:59:26 +00:00
Karlis Susters
31ae938e78 Implemented a stride prefetcher with BRAM instead of vectors 2023-02-13 11:59:26 +00:00
Karlis Susters
79c55c5651 Implemented cross cache prefetching, fixed some coherence bugs in LLC 2023-02-13 11:59:26 +00:00
Karlis Susters
dca4b980c5 Implemented a markov chain data prefetcher 2023-02-13 11:59:26 +00:00
Karlis Susters
9f733eddf1 Merged reportHit & reportMiss, changed compile time parameter passing 2023-02-13 11:59:26 +00:00
Karlis Susters
06e648df6a Implemented target table module, refactored single and multi window instruction prefetchers to use it 2023-02-13 11:59:26 +00:00
Karlis Susters
7c05ebbd90 Implemented multi line target prefetcher 2023-02-13 11:59:26 +00:00
Karlis Susters
e602d4780e LLC prefetcher fixes and single window target prefetcher implementation 2023-02-13 11:59:26 +00:00
Karlis Susters
347107b733 Prefetcher implementation in both L1 and LL and data logging 2023-02-13 11:59:26 +00:00
Peter Rugg
69b96cc68f Extend the final missed id width 2023-02-10 17:09:20 +00:00
Peter Rugg
b0316afcb7 Extend missed id field width 2023-02-10 17:01:32 +00:00
Peter Rugg
50c51e93a1 Add assertion that ndm resets don't get dropped 2023-02-09 14:34:13 +00:00
Peter Rugg
0f081d9441 Connect ndm reset up in src_SSITH_P3 build 2023-02-09 14:21:33 +00:00
Peter Rugg
6931201a14 Avoid wedge on repeated debug resumes (with jdw57 and aj443)
ConfigReg avoids a compile error
2023-01-31 21:02:17 +00:00
Jonathan Woodruff
d9e842b785 Extend ID field to match current design.
This is likely to be cause of lockup in hardware.
2023-01-31 11:21:37 +00:00
Alexandre Joannou
2a69ecb33e Bump BlueStuff 2022-11-17 15:15:29 +00:00
Alexandre Joannou
522de50334 Bump BlueStuff 2022-11-17 14:58:45 +00:00
Alexandre Joannou
34e753a736 Bump BlueStuff 2022-11-16 07:22:13 +00:00
Peter Rugg
e120b3427d Merge branch 'LoadTagsImprove' into CHERI 2022-11-14 13:28:44 +00:00
Alexandre Joannou
6335668b81 Bump BlueStuff 2022-11-02 10:32:14 +00:00
Alexandre Joannou
54456b5f50 Fix the non-rvfi_dii build 2022-10-21 09:50:49 +00:00
Franz Fuchs
de0e19ca55 added do not cares for missing struct fields in ROB 2022-10-21 09:22:31 +00:00